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Volumn , Issue , 2012, Pages 223-232

Hardware acceleration architecture for EtherCAT master controller

Author keywords

[No Author keywords available]

Indexed keywords

HARDWARE ACCELERATION; HIGH-SPEED COMMUNICATIONS; INDUSTRIAL ETHERNETS;

EID: 84866494095     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/WFCS.2012.6242570     Document Type: Conference Paper
Times cited : (9)

References (13)


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.