ATE interconnect performance to 43Gbps using advanced PCB materials

International Engineering Consortium - DesignCon 2008

Volumn , Issue , 2008, Pages 501-524

  Barnes, Heidi ^a   Moreira, Jose ^a   McCarthy, Tom ^b   Burns, William ^c   Gutierrez, Crescencio ^b   Resso, Mike ^a  

^a AGILENT TECHNOLOGIES   (United States)

^b Taconic ^*  (United States)

^c Altanova Corporation   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANALYSIS OF VARIOUS; AUTOMATED TEST EQUIPMENT; DATA RATES; INTERCONNECT PERFORMANCE; PATH LENGTH; SIGNAL INTEGRITY; SIGNAL PATHS; TEST FIXTURE;

DIELECTRIC MATERIALS;

PRINTED CIRCUIT BOARDS;

EID: 84866405553     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)

1. Jose Moreira, Heidi Barnesal., "PCB Loadboard Design Challenges for Multi-Gigabit Devices in Automated Test Applications, " IEC DesignCon 2006.
2. Masashi Shimanouchi, "New Paradigm for Signal Paths in ATE Pin Electronics are Needed for Serialcom Device Testing, " Proceedings of the International Test Conference 2002.
3. Jeff Loyer, "Proper PCB Stackup and Trace Geometry Design are Key Elements in the Fight to Lower Losses", Printed Circuit Design & Manufacture 2006.
4. J. Moreira, H. Barnes, W. Burns, D. Sionne, C. Gutierrez, F. Azeem, "Influence of Dielectric Materials on ATE Test Fixtures for High-Speed Digital Applications", Proceedings of the Sixth International Kharkov Conference on the Physics and Engineering of Microwave, Millimeter and Submillimeter Waves 2007.
5. Martin W. Jawitz and Michael J. Jawitz, "Materials for Rigid and Flexible Printed Wiring Boards, " CRC Press 2006.
6. Jeff Loyer, Richard Kunze and Xiaoning Ye, "Fiber Weave Effect: Practical Impact Analysis and Mitigation Strategies", IEC DesignCon 2007.
7. Scott McMorrow and Chris Head, "The Impact of PCB Laminate Weave on the Electrical Performance of Differential Signaling at Multi-gigabit Data Rates", IEC Designcon East 2005.
8. Thomas F. McCarthy and David L. Wynants Sr., "Low signal loss bonding ply for multilayer circuit boards", US patent 6, 500, 529.
9. "Basics of Measuring the Dielectric Properties of Materials" Agilent Application Note, PN 5989-2589EN.
10. H. Barnes, J. Moreira, H. Ossoinig, M. Wollitzer, T. Schmidt, M. Tsai, "Development of a Pogo Via Design for Multi-Gigabit Interfaces on Automated Test Equipment, " Proceedings of the 2006 Asia-Pacific Microwave Conference.
11. st IEEE International Workshop on Automated Test Equipment: VISION ATE 2020.
12. Wolfram Humann, "Compensation of Transmission Line Loss for Gbit/s Test on ATEs, " Proceedings of the International Test Conference 2002.
13. Jose Moreira et al., "Passive Equalization of Test Fixture for High-Speed Digital Measurements with Automated Test Equipment, " Proceedings of the 2006 International Design and Test Workshop.
14. B. Szendrenyi, H. Barnes, J. Moreira, M. Wollitzer, T. Schmid and M. Tsai, "Addressing the Broadband Crosstalk Challenges of Pogo Pin Type Interfaces for High- Density High-Speed Digital Applications, " 2007 IEEE International Microwave Symposium.