Carbon nanotube field-effect transistors for use as pass transistors in integrated logic gates and full subtractor circuits

ACS Nano

Volumn 6, Issue 5, 2012, Pages 4013-4019

  Ding, Li ^a   Zhang, Zhiyong ^a   Pei, Tian ^a   Liang, Shibo ^a   Wang, Sheng ^a   Zhou, Weiwei ^b   Liu, Jie ^b   Peng, Lian Mao ^a  

^a PEKING UNIVERSITY   (China)

^b DUKE UNIVERSITY   (United States)

Author keywords

Carbon nanotube; Integrated circuits; Logic gates; Pass transistor logic; Subtractor

Indexed keywords

CARBON NANOTUBE FIELD-EFFECT TRANSISTORS; CMOS CIRCUITS; OUTPUT VOLTAGES; P-TYPE; PASS TRANSISTORS; PASS-TRANSISTOR LOGIC; SUBTRACTOR; SUBTRACTOR CIRCUITS;

CARBON NANOTUBES; CMOS INTEGRATED CIRCUITS; FIELD EFFECT TRANSISTORS; INTEGRATED CIRCUITS; LOGIC GATES;

TRANSISTORS;

EID: 84864667300     PISSN: 19360851     EISSN: 1936086X     Source Type: Journal    
DOI: 10.1021/nn300320j     Document Type: Article

References (23)

1. Dai, H. J.; Javey, A.; Pop, E.; Mann, D.; Lu, Y. Electrical Transport Properties and Field-Effect Transistors of Carbon Nanotube. NANO: Brief Reports and Reviews 2006, 1, 1-13.
2. Avouris, Ph.; Chen, Z. H.; Perebeinos, V. Carbon-Based Electronics. Nat. Nanotechnol. 2007, 2, 605-615.
3. Franklin, A. D.; Chen, Z. Length Scaling of Carbon Nanotube Transistors. Nat. Nanotechnol. 2010, 5, 858-862.
4. Javey, A.; Guo, J.; Farmer, D. B.; Wang, Q.; Wang, D. W.; Gordon, R. G.; Lundstrom, M.; Dai, H. J. Carbon Nanotube Field-Effect Transistors with Integrated Ohmic Contacts and High-κ Gate Dielectrics. Nano Lett. 2004, 4, 447-450.
5. Javey, A.; Guo, J.; Farmer, D. B.; Wang, Q.; Yenilmez, E.; Gordon, R. G.; Lundstrom, M.; Dai, H. J. Self-Aligned Ballistic Molecular Transistors and Electrically Parallel Nanotube Arrays. Nano Lett. 2004, 4, 1319-1322.
6. Zhang, Z. Y.; Liang, X. L.; Wang, S.; Yao, K.; Hu, Y. F.; Zhu, Y. Z.; Chen, Q.; Zhou, W. W.; Li, Y.; Yao, Y. G.; et al. Doping-Free Fabrication of Carbon Nanotube Based Ballistic CMOS Devices and Circuits. Nano Lett. 2007, 7, 3603-3607.
7. Zhang, Z. Y.; Wang, S.; Ding, L.; Liang, X. L.; Pei, T.; Shen, J.; Xu, H. L.; Chen, Q.; Cui, R. L.; Li, Y.; et al. Self-Aligned Ballistic n-Type Single-Walled Carbon Nanotube Field-Effect Transistors with Adjustable Threshold Voltage. Nano Lett. 2008, 8, 3696-3701.
8. Wang, Z. X.; Xu, H. L.; Zhang, Z. Y.; Wang, S.; Ding, L.; Zeng, Q. S.; Yang, L. J.; Pei, T.; Liang, X. L.; Gao, M.; et al. Yttrium Oxide as a Perfect High-κ Gate Dielectric for Carbon-Based Electronics. Nano Lett. 2010, 10, 2024-2030.
9. Javey, A.; Wang, Q.; Ural, A.; Li, Y.; Dai, H. Carbon Nanotube Transistor Arrays for Multistage Complementary Logic and Ring Oscillators. Nano Lett. 2002, 2, 929-932.
10. Derycke, V.; Martel, R.; Appenzeller, J.; Avouris, Ph. Carbon Nanotube Inter-and Intramolecular Logic Gates. Nano Lett. 2001, 1, 453-456.
11. Bachtold, A.; Hadley, P.; Nakanishi, T.; Deeker, C. Logic Circuits with Carbon Nanotube Transistors. Science 2001, 294, 1317-1320.
12. Zhang, Z. Y.; Wang, S.; Wang, Z. X.; Ding, L.; Pei, T.; Hu, Z. D.; Liang, X. L.; Chen, Q.; Li, Y.; Peng, L.-M. Almost Perfectly Symmetric SWCNT-Based CMOS Devices and Scaling. ACS Nano 2009, 3, 3781-3187.
13. Chen, Z.; Appenzeller, J.; Lin, Y.-M.; Sippel-Oakley, J.; Rinzler, A. G.; Tang, J.; Wind, S. J.; Solomon, P. M.; Avouris, Ph. An Integrated Logic Circuit Assembled on a Single Carbon Nanotube. Science 2006, 311, 1735.
14. Ryu, K. M.; Badmaev, A.; Wang, C.; Lin, A.; Patil, N.; Gomez, L.; Kumar, A.; Mitra, S.; Wong, H.-S.; Zhou, C. W. CMOSAnalogous Wafer-Scale Nanotube-on-Insulator Approach for Submicrometer Devices and Integrated Circuits Using Aligned Nanotubes. Nano Lett. 2009, 1, 189-197.
15. Sun, D.-m.; Timmermans, M. Y.; Tian, Y.; Nasibulin, A. G.; Kauppinen, E. I.; Kishimoto, S.; Mizutani, T.; Ohno, Y. Flexible High-Performance Carbon Nanotube Integrated Circuits. Nature 2011, 424, 156-161.
16. Cao, Q.; Kim, H.-s.; Pimparkar, N.; Kulkarni, J. P.; Wang, C.; Shim, M.; Roy, K.; Alam, M. A.; Rogers, J. A. Medium-Scale Carbon Nanotube Thin-Film Integrated Circuits on Flexible Plastic Substrates. Nature 2008, 454, 495-500.
17. Yu, W. J.; Kim, U. J.; Kang, B. R.; Lee, H., II; Lee, E.-H.; Lee, Y. H. Adaptive Logic Circuits with Doping-Free Ambipolar Carbon Nanotube Transistors. Nano Lett. 2009, 9, 1401-1405.
18. Franklin, A. D.; Chen, Z. Length Scaling of Carbon Nanotube Transistors. Nat. Nanotechnol. 2010, 5, 858-862.
19. Rabaey, J. M.; Chandrakasan, A.; Nikolic, B. Digital Integrated Circuits; Prentice Hall/Pearson: Upper Saddle River, NJ, 2003.
20. Weste, N. H. E.; Harris, D. CMOS VLSI Design: A Circuits and System Perspective, 3rd ed.; Addison Wesley: Boston, MA, 2004.
21. Zimmermann, R.; Fichtner, W. Low-Power Logic Styles: CMOS versus Pass-Transistor Logic. IEEE J. Solid-State Circuits 1997, 1079-1090.
22. Ding, L.; Zhang, Z. Y.; Liang, S. B.; Pei, T.; Wang, S.; Li, Y.; Zhou, W. W.; Liu, J.; Peng, L.-M. CMOS-Based Carbon Nanotube Pass Transistor Logic Integrated Circuits. Nat. Commun. 2012, 3, 677.
23. Zhou, W. W.; Han, Z. Y.; Wang, J. Y.; Zhang, Y.; Jin, Z.; Sun, X.; Zhang, Y. W.; Yan, C. H.; Li, Y. Z.; et al. Copper Catalyzing Growth of Single-Walled Carbon Nanotubes on Substrates. Nano Lett. 2006, 6, 2987-2990.