Highly reliable flash memory with self-aligned split-gate cell embedded into high performance 65nm CMOS for automotive & smartcard applications

2012 4th IEEE International Memory Workshop, IMW 2012

Volumn , Issue , 2012, Pages

  Shum, D ^a   Power, J R ^a   Ullmann, R ^a   Suryaputra, E ^a   Ho, K ^a   Hsiao, J ^a   Tan, C H ^a   Langheinrich, W ^b   Bukethal, C ^b   Pissors, V ^b   Tempel, G ^b   Rohrich M ^b   Gratz, A ^b   Iserhagen, A ^b   Andersen, E O ^b   Paprotta, S ^b   Dickenscheid, W ^b   Strenz, R ^b   Duschl, R ^b   Kern, T ^b   Hsieh, C T ^c   Huang, C M ^c   Ho, C W ^c   Kuo, H H ^c   Hung, C W ^c   Lin, Y T ^c   Tran, L C ^c   more..

^a Infineon Technologies Taiwan Co Ltd   (Taiwan)

^b INFINEON TECHNOLOGIES AG   (Germany)

^c TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

AREA OVERHEAD; CMOS LOGIC PROCESS; FLASH MEMORY CELL; GATE SPACERS; LOW-K INTERCONNECTS; SELF-ALIGNED; SMART-CARD APPLICATION; SPLIT GATES; SPLIT-GATE CELLS; STACKED GATE;

SMART CARDS;

FLASH MEMORY;

EID: 84864146326     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IMW.2012.6213670     Document Type: Conference Paper

References (11)

1. Y.S. Shin et al., VLSI Symp. Tech. Dig., 2005, pp. 156-159J.
2. R. Strenz, IEDM 2011, pp. 211-214.
3. B. J. Ahn et al., IEEE EDL, vol. 19, pp. 438-440, Nov. 1998;
4. R. Mih et al, VLSI Symp. Tech. Dig., 2000, pp. 120-121.
5. J.V. Houdt et al., IEEE TED, vol. 39, pp. 1150-6, May 1992.
6. Y.H. Wang et al., IEEE TED, vol. 52, pp. 385-391, Mar 2005;
7. W.T.Chu et al., IEEE TED, vol. 51, pp. 1667-1671, Oct 2004.
8. M.-Y. Wu et al., IEEE TED, vol. 53, pp. 109-111, Jan. 2006.
9. N. Akil et al., IEEE TED, vol. 52, pp. 492-499, April 2005.
10. F. Piazza et al., IMW2010, pp. 77-79.
11. M. Jefremow1 et al., to be presented at ISSCC2012 section 25.4.