Efficient byte permutation realizations for compact AES implementations

13th European Signal Processing Conference, EUSIPCO 2005

Volumn , Issue , 2005, Pages 2062-2065

  Järvinen, Tuomas ^a   Salmela, Perttu ^a   Hämäläinen, Panu ^a   Takala, Jarmo ^a  

^a TAMPERE UNIVERSITY OF TECHNOLOGY   (Finland)

Author keywords

[No Author keywords available]

Indexed keywords

128-BIT DATA; ADVANCED ENCRYPTION STANDARD ALGORITHMS; AES ALGORITHMS; AREA EFFICIENT; INPUT DATAS; PERMUTATION OPERATIONS; STORAGE ELEMENTS;

ALGORITHMS; DATA PRIVACY; SIGNAL PROCESSING;

CRYPTOGRAPHY;

EID: 84863649559     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)

1. Advanced Encryption Standard, National Institute of Standards and Technology Std., Nov. 2001.
2. Wireless Medium Access Control (MAC) and Physical Layer (PHY) specifications for low-rate wireless personal area networks, IEEE Std., 2003.
3. A. J. Elbirt, W. Yip, B. Chetwynd, and C. Paar, "An FPGA-based performance evaluation of the AES block cipher candidate algorithm finalists," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 9, no. 4, pp. 545-557, Aug. 2001.
4. P. Chodowiec and K. Gaj, "Very compact FPGA implementation of the AES algorithm." in CHES, ser. Lecture Notes in Computer Science, C. D.Walter, Ç. K. Koç, and C. Paar, Eds., vol. 2779. Springer, 2003, pp. 319-333.
5. S. McMillan and C. Patterson, "Jbitstm implementations of the advanced encryption standard (Rijndael)." in FPL, ser. Lecture Notes in Computer Science, G. J. Brebner and R. Woods, Eds., vol. 2147. Springer, 2001, pp. 162-171.
6. A. Satoh, S. Morioka, K. Takano, and S. Munetoh, "A compact Rijndael hardware architecture with S-box optimization," in ASIACRYPT '01: Proceedings of the 7th International Conference on the Theory and Application of Cryptology and Information Security. Springer-Verlag, 2001, pp. 239-254.
7. V. Rijmen. Efficient implementation of the Rijndael S-box. [Online]. Available: www.esat.kuleuven.ac.be/~rijmen/rijndael/sbox.pdf
8. A. Rudra, P. K. Dubey, C. S. Jutla, V. Kumar, J. R. Rao, and P. Rohatgi, "Efficient Rijndael encryption implementation with composite field arithmetic," in CHES '01: Proceedings of the Third International Workshop on Cryptographic Hardware and Embedded Systems. Springer-Verlag, 2001, pp. 171-184.
9. K. K. Parhi, "Systematic synthesis of DSP data format converters using life-time analysis and forwardbackward register allocation," IEEE Transactions on Circuits and Systems-Part II: Analog and Digital Signal Processing, vol. 39, no. 7, pp. 423-440, Jul. 1992.