Scheduling and mapping of conditional task graphs for the synthesis of low power embedded systems

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2003, Pages 90-95

  Wu, Dong ^a   Al Hashimi, Bashir M ^a   Eles, Petru ^b  

^a UNIVERSITY OF SOUTHAMPTON   (United Kingdom)

^b LINKÖPING UNIVERSITY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

DYNAMIC VOLTAGE SCALING; ENERGY REDUCTION; LOW POWER EMBEDDED SYSTEMS; SLACK TIME; TASK GRAPH;

EMBEDDED SYSTEMS; EXHIBITIONS; MAPPING;

VOLTAGE STABILIZING CIRCUITS;

EID: 84863023628     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2003.1253592     Document Type: Conference Paper

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