Optimum design of power distribution system via clock modulation

Electrical Performance of Electronic Packaging

Volumn , Issue , 2003, Pages 45-48

  Weekly, Roger ^a   Chun, Sungjun ^a   Haridass, Anand ^a   O'Reilly, Colm ^a   Jordan, James ^a   O'Connell, Frank ^a  

^a IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CLOCKS; ELECTRONICS PACKAGING; MODULATION;

CLOCK MODULATION; CURRENT EXCITATION; FUNCTION OF FREQUENCY; OPTIMUM DESIGNS; POWER DISTRIBUTION SYSTEM;

DENSE WAVELENGTH DIVISION MULTIPLEXING;

EID: 84860098387     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EPEP.2003.1249997     Document Type: Conference Paper

References (3)

1. R 4 Processors Power Delivery " Symposium on VLSI Circuits Digest of Technical Papers, pp. 220-223, June 2002.
2. th Topical Meeting on Electrical Performance of Electronic Packaging, pp. 249-252, October 2002.
3. Sungjun Chun, Madhavan Swaminathan, Larry D. Smith, Jegganathan Srinivasan, Zhang Jin and Mahadcvan K. Iyer, "Modeling of Simultaneous Switching Noise in High Speed Systems, " IEEE Transactions on Advanced Packaging, Vol. 24, No. 2, pp. 132-142, May 2001.