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Volumn , Issue , 2011, Pages

Slow-switching-limit loss removal in SC DC-DC converters using adiabatic charging

Author keywords

[No Author keywords available]

Indexed keywords

ANALYSIS METHOD; AREA OVERHEAD; CMOS PROCESSS; ENERGY DENSITY; NOVEL TECHNIQUES; OUTPUT FILTERS; SC DC-DC CONVERTERS; SERIES INDUCTOR; SWITCHED CAPACITOR;

EID: 84856918149     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICEAC.2011.6136700     Document Type: Article
Times cited : (7)

References (9)
  • 2
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    • Jun.
    • T. Van Breussegem and M. Steyaert, "A 82% efficiency 0.5% ripple 16-phase fully integrated capacitive voltage doubler," IEEE Symp. VLSI Circuits, pp. 198-199, Jun. 2009.
    • (2009) IEEE Symp. VLSI Circuits , pp. 198-199
    • Van Breussegem, T.1    Steyaert, M.2
  • 3
    • 70449553867 scopus 로고    scopus 로고
    • Multi-phase 1GHz voltage doubler charge pump in 32nm logic process
    • Jun.
    • D. Somasekhar, et al., "Multi-phase 1GHz voltage doubler charge pump in 32nm logic process," IEEE Symp. VLSI Circuits, pp. 196-197, Jun. 2009.
    • (2009) IEEE Symp. VLSI Circuits , pp. 196-197
    • Somasekhar, D.1
  • 4
    • 41549120666 scopus 로고    scopus 로고
    • Analysis and optimization of switchedcapacitor DC-DC converters
    • Mar.
    • M. Seeman and S. Sanders, "Analysis and optimization of switchedcapacitor DC-DC converters", IEEE Trans. on Power Electronics, vol. 23, no. 2, Mar. 2008.
    • (2008) IEEE Trans. on Power Electronics , vol.23 , Issue.2
    • Seeman, M.1    Sanders, S.2
  • 6
    • 47649098075 scopus 로고    scopus 로고
    • A low voltage, low ripple, on chip, dual switch-capacitor based hybrid DC-DC converter
    • Jan. 4-8
    • K. Bhattacharyya and P. Mandal, "A low voltage, low ripple, on chip, dual switch-capacitor based hybrid DC-DC converter," Int. Conf. on VLSI Design, pp. 661-666, Jan. 4-8 2008.
    • (2008) Int. Conf. on VLSI Design , pp. 661-666
    • Bhattacharyya, K.1    Mandal, P.2
  • 7
    • 48849088748 scopus 로고    scopus 로고
    • Integrated regulation for energy-efficient digital circuits
    • Aug.
    • E. Alon and M. Horowitz, "Integrated regulation for energy-efficient digital circuits," IEEE J. Solid-State Circuits, pp. 1795-1807, Aug. 2008.
    • (2008) IEEE J. Solid-State Circuits , pp. 1795-1807
    • Alon, E.1    Horowitz, M.2
  • 9
    • 20844454351 scopus 로고    scopus 로고
    • A 233-MHz 80%-87% efficient four-phase DC-DC converter utilizing air-core inductors on package
    • April
    • P. Hazucha, et al., "A 233-MHz 80%-87% efficient four-phase DC-DC converter utilizing air-core inductors on package," IEEE Journal of Solid-State Circuits, vol. 40, no. 4, pp. 838-845, April 2005.
    • (2005) IEEE Journal of Solid-State Circuits , vol.40 , Issue.4 , pp. 838-845
    • Hazucha, P.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.