FFT implementation with fused floating-point operations

IEEE Transactions on Computers

Volumn 61, Issue 2, 2012, Pages 284-288

  Swartzlander, Earl E ^a   Saleh, Hani H M ^b  

^a The University of Texas at Austin   (United States)

^b APPLE INC   (United States)

Author keywords

fast Fourier transform; Floating point arithmetic; fused floating point operations; Radix 2 FFT butterfly; Radix 4 FFT butterfly

Indexed keywords

DIGITAL ARITHMETIC;

BUTTERFLY OPERATION; COMPLEX-VALUED; FFT PROCESSORS; FLOATING-POINT ARITHMETIC; FUSED FLOATING-POINT OPERATIONS; RADIX 2; RADIX-2 FAST FOURIER TRANSFORM BUTTERFLY; RADIX-4; RADIX-4 BUTTERFLY; RADIX-4 FAST FOURIER TRANSFORM BUTTERFLY;

FAST FOURIER TRANSFORMS;

EID: 84855422103     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2010.271     Document Type: Article

References (11)

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