Addressing DC component in pll and notch filter algorithms

IEEE Transactions on Power Electronics

Volumn 27, Issue 1, 2012, Pages 78-86

  Karimi Ghartemani, Masoud ^a   Khajehoddin, S Ali ^b   Jain, Praveen K ^a   Bakhshai, Alireza ^a   Mojiri, Mohsen ^c  

^a QUEEN S UNIVERSITY   (Canada)

^b Department of Research and Development   (Canada)

^c ISFAHAN UNIVERSITY OF TECHNOLOGY   (Iran)

Author keywords

Adaptive notch filter (ANF); Dc component; Dc offset; Enhanced phase locked loop (EPLL); Notch filter (NF); Orthogonal signal generator (OSG); Phase locked loop (PLL); Synchronous reference frame phase locked loop (SRF PLL)

Indexed keywords

ADAPTIVE NOTCH FILTERS; DC COMPONENTS; DC OFFSETS; ENHANCED PHASE-LOCKED LOOP (EPLL); ORTHOGONAL SIGNALS; PHASE-LOCKED LOOP (PLL); SYNCHRONOUS REFERENCE-FRAME PHASE-LOCKED LOOP (SRF-PLL);

ADAPTIVE FILTERS; ALGORITHMS; DYNAMIC RESPONSE; PHASE LOCKED LOOPS; SIGNAL GENERATORS;

NOTCH FILTERS;

EID: 83655172908     PISSN: 08858993     EISSN: None     Source Type: Journal    
DOI: 10.1109/TPEL.2011.2158238     Document Type: Article

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