Offset rejection for PLL based synchronization in grid-connected converters

Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC

Volumn , Issue , 2008, Pages 1611-1617

  Ciobotaru, Mihai ^a   Teodorescu, Remus ^a   Agelidis, Vassilios G ^b  

^a AALBORG UNIVERSITY   (Denmark)

^b UNIVERSITY OF SYDNEY   (Australia)

Author keywords

[No Author keywords available]

Indexed keywords

ERROR ANALYSIS; EXHIBITIONS; PARAMETER ESTIMATION; PHASE LOCKED LOOPS;

DATA-CONVERSION; ESTIMATED PARAMETERS; FUNDAMENTAL FREQUENCIES; GRID FREQUENCY; GRID VOLTAGE; GRID-CONNECTED; PHASE ANGLES; REFERENCE SIGNALS; SECOND ORDERS; VOLTAGE OFFSETS;

POWER ELECTRONICS;

EID: 49249100542     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/APEC.2008.4522940     Document Type: Conference Paper

References (15)

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