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1
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0015127532
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Memristor - The Missing Circuit Element
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September
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L. O. Chua, "Memristor - the Missing Circuit Element," IEEE Transactions on Circuit Theory, Vol. 18, No. 5, pp. 507-519, September 1971.
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IEEE Transactions on Circuit Theory
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Chua, L.O.1
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2
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43049126833
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The Missing Memristor Found
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May
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D. B. Strukov, G. S.Snider, D. R. Stewart, and R. S. Williams, "The Missing Memristor Found," Nature, Vol. 453, pp. 80-83, May 2008.
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(2008)
Nature
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Strukov, D.B.1
Snider, G.S.2
Stewart, D.R.3
Williams, R.S.4
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3
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76349087581
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Nonvolatile Memristor Memory: Device Characteristics and Design Implications
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November
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Y. Ho, G. M. Huang, P. Li, "Nonvolatile Memristor Memory: Device Characteristics and Design Implications," Proceedings of the IEEE International Conference on Computer-Aided Design, pp. 485-490, November 2009.
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(2009)
Proceedings of the IEEE International Conference on Computer-Aided Design
, pp. 485-490
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Ho, Y.1
Huang, G.M.2
Li, P.3
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4
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71249131272
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Implementation of Biologically Plausible Spiking Neural Network Models on the Memristor Crossbar-based CMOS/Nano Circuits
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August
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A. Afifi, A. Ayatollahi, and F. Raissi, "Implementation of Biologically Plausible Spiking Neural Network Models on the Memristor Crossbar-based CMOS/Nano Circuits," Proceedings of the European Conference on Circuit Theory and Design, pp. 563- 566, August 2009.
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(2009)
Proceedings of the European Conference on Circuit Theory and Design
, pp. 563-566
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Afifi, A.1
Ayatollahi, A.2
Raissi, F.3
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5
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77955656422
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Practical Approach to Programmable Analog Circuits with Memristors
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August
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Y. V. Pershin and M. Di Ventra, "Practical Approach to Programmable Analog Circuits with Memristors," IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 57, No. 8, pp. 1857-1864, August 2010.
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(2010)
IEEE Transactions on Circuits and Systems I: Regular Papers
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, pp. 1857-1864
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Pershin, Y.V.1
Di Ventra, M.2
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6
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18744373862
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CMOL FPGA: A Reconfigurable Architecture for Hybrid Digital Circuits with Two-Terminal Nanodevices
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June
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D. B. Strukov and K. K. Likharev, "CMOL FPGA: a Reconfigurable Architecture for Hybrid Digital Circuits with Two-Terminal Nanodevices," Nanotechnology, Vol. 16, No. 6, pp. 888-900, June 2005.
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(2005)
Nanotechnology
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Strukov, D.B.1
Likharev, K.K.2
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7
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33846807711
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Nano/CMOS Architectures Using a Field-Programmable Nanowire Interconnect
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January
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G. S. Snider and R. S. Williams, "Nano/CMOS Architectures Using a Field-Programmable Nanowire Interconnect," Nanotechnology, Vol. 18, No. 3, 035204, January 2007.
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(2007)
Nanotechnology
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Snider, G.S.1
Williams, R.S.2
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8
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55349119468
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A Programmable Majority Logic Array Using Molecular Scale Electronics
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November
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G. S. Rose and M. R. Stan, "A Programmable Majority Logic Array Using Molecular Scale Electronics," IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 54, No. 11, pp. 2380-2390, November 2007.
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(2007)
IEEE Transactions on Circuits and Systems I: Regular Papers
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Rose, G.S.1
Stan, M.R.2
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9
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16244389374
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Computing with Hysteretic Resistor Crossbars
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March
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G. Snider, "Computing with Hysteretic Resistor Crossbars," Applied Physics A: Materials Science and Processing, Vol. 80, No. 6, pp. 1165-1172, March 2005.
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(2005)
Applied Physics A: Materials Science and Processing
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Snider, G.1
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10
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77950852717
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Memristive Switches Enable 'Stateful' Logic Operations via Material Implication
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April
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J. Borghetti, G. S. Snider, P. J. Kuekes, J. J. Yang, D. R. Stewart, and R. S. Williams, "Memristive Switches Enable 'Stateful' Logic Operations via Material Implication," Nature, Vol. 464, pp. 873-876, April 2010.
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(2010)
Nature
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, pp. 873-876
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Borghetti, J.1
Snider, G.S.2
Kuekes, P.J.3
Yang, J.J.4
Stewart, D.R.5
Williams, R.S.6
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13
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76249096489
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Two Memristors Suffice to Compute All Boolean Functions
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February
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E. Lehtonen, J. H. Poikonen, and M. Laiho, "Two Memristors Suffice to Compute All Boolean Functions," Electronics Letters, Vol. 46, No. 3, pp. 239-240, February 2010.
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(2010)
Electronics Letters
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Lehtonen, E.1
Poikonen, J.H.2
Laiho, M.3
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14
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79961014062
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Memristor MOS Content Addressable Memory (MCAM): Hybrid Architecture for Future High Performance Search Engines
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in press
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K. Eshraghian, K. R. Cho, O. Kavehei, S. K. Kang, D. Abbot, and S. M. S. Kang, "Memristor MOS Content Addressable Memory (MCAM): Hybrid Architecture for Future High Performance Search Engines,"IEEE Transactions on Very Large Scale Integrated Systems, in press.
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IEEE Transactions on Very Large Scale Integrated Systems
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Eshraghian, K.1
Cho, K.R.2
Kavehei, O.3
Kang, S.K.4
Abbot, D.5
Kang, S.M.S.6
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15
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70350457460
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Spice Model of Memristor with Nonlinear Dopant Drift
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June
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Z. Biolek, D. Biolek, and V. Biolkova, "Spice Model of Memristor with Nonlinear Dopant Drift," Radioengineering, Vol. 18, No. 2, Part 2, pp. 210-214, June 2009.
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(2009)
Radioengineering
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Biolek, Z.1
Biolek, D.2
Biolkova, V.3
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