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Volumn 39, Issue 11, 2004, Pages 2046-2051

A 14-b linear capacitor self-trimming pipelined ADC

Author keywords

Calibration; Pipelined ADC; Self trimming

Indexed keywords

AMPLIFIERS (ELECTRONIC); CAPACITORS; CMOS INTEGRATED CIRCUITS; ELECTRIC POTENTIAL; FEEDBACK; SIGNAL PROCESSING;

EID: 8344275158     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2004.835823     Document Type: Article
Times cited : (36)

References (11)
  • 1
    • 0025562755 scopus 로고
    • A 10 b 15 MHz CMOS recycling two-step A/D converter
    • Dec.
    • B. Song, S. Lee, and M. Tompsett, "A 10 b 15 MHz CMOS recycling two-step A/D converter," IEEE J. Solid-State Circuits, vol. 25, pp. 1328-1338, Dec. 1990.
    • (1990) IEEE J. Solid-state Circuits , vol.25 , pp. 1328-1338
    • Song, B.1    Lee, S.2    Tompsett, M.3
  • 5
    • 0026141224 scopus 로고
    • A 13 b 2.5 MHz self-calibrated pipelined A/D converter in 3 μm CMOS
    • Apr.
    • Y. Lin, B. Kim, and P. Gray, "A 13 b 2.5 MHz self-calibrated pipelined A/D converter in 3 μm CMOS," IEEE J. Solid-State Circuits, vol. 26, pp. 628-636, Apr. 1991.
    • (1991) IEEE J. Solid-state Circuits , vol.26 , pp. 628-636
    • Lin, Y.1    Kim, B.2    Gray, P.3
  • 6
    • 0029293925 scopus 로고
    • A 13 b 10 MSample/s ADC digitally calibrated with oversampling delta-sigma converer
    • Apr.
    • T. Shu, B. Song, and K. Bacrania, "A 13 b 10 MSample/s ADC digitally calibrated with oversampling delta-sigma converer," IEEE J. Solid-State Circuits, vol. 30, pp. 443-452, Apr. 1995.
    • (1995) IEEE J. Solid-state Circuits , vol.30 , pp. 443-452
    • Shu, T.1    Song, B.2    Bacrania, K.3
  • 7
    • 0034479476 scopus 로고    scopus 로고
    • A self-trimming 14 b 100 MS/s CMOS DAC
    • Dec.
    • A. Bugeja and B. Song, "A self-trimming 14 b 100 MS/s CMOS DAC," IEEE J. Solid-State Circuits, vol. 35, pp. 1841-1852, Dec. 2000.
    • (2000) IEEE J. Solid-state Circuits , vol.35 , pp. 1841-1852
    • Bugeja, A.1    Song, B.2
  • 8
    • 0034482479 scopus 로고    scopus 로고
    • A 13 b 40 MS/s CMOS pipelined folding ADC with background offset trimming
    • Dec.
    • M. Choe, B. Song, and K. Bacrania, "A 13 b 40 MS/s CMOS pipelined folding ADC with background offset trimming," IEEE J. Solid-State Circuits, vol. 35, pp. 1781-1790, Dec. 2000.
    • (2000) IEEE J. Solid-state Circuits , vol.35 , pp. 1781-1790
    • Choe, M.1    Song, B.2    Bacrania, K.3
  • 10
    • 0024122160 scopus 로고
    • A 12 b 1 Msample/s capacitor error averaging pipelined A/D converter
    • Dec.
    • B. Song, M. Tompsett, and K. Lakshmikumar, "A 12 b 1 Msample/s capacitor error averaging pipelined A/D converter," IEEE J. Solid-State Circuits, vol. SC-23, pp. 1324-1333, Dec. 1988.
    • (1988) IEEE J. Solid-state Circuits , vol.SC-23 , pp. 1324-1333
    • Song, B.1    Tompsett, M.2    Lakshmikumar, K.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.