A 2-GHz analog-to-digital Delta-sigma modulator for CDMA receivers with 79-dB signal-to-noise ratio in 1.23-MHz bandwidth

IEEE Journal of Solid-State Circuits

Volumn 39, Issue 11, 2004, Pages 1819-1828

  Dagher, Elias H ^a,b   Stubberud, Peter A ^a,c   Masenten, Wesley K ^a,d   Conta, Matteo ^a,e   Dinh, Thang Victor ^a,f  

^a Ditrans Corporation   (United States)

^b SKYWORKS SOLUTIONS INC   (United States)

^c UNIVERSITY OF NEVADA   (United States)

^d Masenten and Associates   (United States)

^e RFDomus   (United States)

^f Unav Microelectronics   (United States)

Author keywords

Analog digital conversion; CMOS; Code division multiple access (CDMA); Continuous time delta sigma modulation; High speed integrated circuit

Indexed keywords

ANALOG TO DIGITAL CONVERSION; BANDWIDTH; CODE DIVISION MULTIPLE ACCESS; HETEROJUNCTION BIPOLAR TRANSISTORS; INTEGRATED CIRCUITS; MODULATORS; RADIO RECEIVERS; SIGNAL TO NOISE RATIO;

AUTOMATIC GAIN CONTROL (AGC); CHANNEL FILTERING; CONTINUOUS-TIME DELTA-SIGMA MODULATION; HIGH-SPEED INTEGRATED CIRCUITS;

DELTA SIGMA MODULATION;

EID: 8344271022     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2004.835831     Document Type: Article

References (16)

1. D. K. Weaver, "A third method of generation and detection of single-sideband signals," in Proc. IRE, Dec. 1956, pp. 1703-1705.
2. G. Raghavan, J. F. Jensen, J. Laskowski, M. Kardos, M. G. Case, M. Sokolich, and S. Thomas III, "Architecture, design, and test of continuous-time tunable intermediate-frequency bandpass delta-sigma modulators," IEEE J. Solid-State Circuits, vol. 36, pp. 5-13, Jan. 2001.
3. S. Jaganathan et al., "An 18-GHz continuous-time Σ - Δ analog-digital converter implemented in InP-transferred substrate HBT technology," IEEE J. Solid-State Circuits, vol. 36, pp. 1343-1350, Sept. 2001.
4. J. F. Jensen, G. Raghavan, A. E. Coxand, and R. H. Walden, "A 3.2-GHz second-order delta-sigma modulator implemented in InP HBT technology," IEEE J. Solid-State Circuits, vol. 30, pp. 1119-1127, Oct. 1995.
5. J. A. Cherry, W. M. Snelgrove, and W. Gao, "On the design of a forth-order continuous-time LC delta-sigma-modulator for UHF A/D conversion," IEEE Trans. Circuits Syst. II, vol. 47, pp. 518-530, June 2000.
6. W. Gao, J. A. Cherry, and W. M. Snelgrove, "A 4 GHz fourth-order SiGe HBT band pass ΔΣ modulator," in Symp. VLSI Circuits Dig. Tech. Papers, 1998, pp. 174-175.
7. M. S. Kappes, "A 2.2-mW CMOS bandpass continuous-time multibit Δ - Σ ADC with 68 dB of dynamic range and 1-MHz bandwidth for wireless applications," IEEE J. Solid-State Circuits, vol. 38, pp. 1098-1104, July 2003.
8. R. van Veldhoven, "A tri-mode continuous-time ΔΣ modulator with switched-capacitor feedback DAC for a GSM-EDGE/CDMA2000/UMTS receiver," in IEEE ISSCC Dig. Tech. Papers, 2003, paper 3.4.
9. TIA/EIA Standard-Recommend Minimum Performance Standards for cdma2000 Spread Spectrum Mobil Stations, TIA/EIA-98-D-2001, June 2001.
10. D. A. Johns and K. Martin, Analog Integrated Circuit Design. New York: Wiley, 1997.
11. Delta-Sigma Data Converters-Theory, Design, and Simulation, S. R. Norsworthy, R. Schreier, and G. C. Temes, Eds., IEEE Press, Piscataway, NJ, 1996.
12. L. Breems and J. H. Huijsing, Continuous-Time Sigma-Delta Modulation for A/D Conversion in Radio Receivers. Boston, MA: Kluwer, 2001.
13. J. A. Cherry and W. M. Snelgrove, "Excess loop delay in continuous-time delta-sigma modulators," IEEE Trans. Circuits Syst. II, vol. 46, pp. 376-389, Apr. 1999.
14. _, Continuous-Time Delta-Sigma Modulators for High-Speed A/d Conversion: Theory, Practice and Fundamental Performance Limits. Boston, MA: Kluwer, 2000.
15. E. J. van der Zwan and E. C. Dijkmans, "A 0.2-mW CMOS delta-sigma modulator for speech coding with 80 dB dynamic range," IEEE J. Solid-State Circuits, vol. 31, pp. 1873-1880, Dec. 1996.
16. R. W. Adams. "Design and implementation of an audio 18-bit analog-to-digital converter using over-sampling techniques" J. Audio Eng. Soc., vol. 34, Mar. 1986.