-
1
-
-
0028713158
-
On sampling rate, analog prefiltering, and sufficient statistics for digital receivers
-
Dec.
-
H. Meyr et al., "On sampling rate, analog prefiltering, and sufficient statistics for digital receivers," IEEE Trans. Commun., vol. 42, pp. 3208-3214, Dec. 1994.
-
(1994)
IEEE Trans. Commun.
, vol.42
, pp. 3208-3214
-
-
Meyr, H.1
-
2
-
-
0033221979
-
A single-chip universal cable set-top box/modem transceiver
-
Nov.
-
L. D'Luna et al., "A single-chip universal cable set-top box/modem transceiver," IEEE J. Solid-State Circuits, vol. 34, pp. 1647-1660, Nov. 1999.
-
(1999)
IEEE J. Solid-state Circuits
, vol.34
, pp. 1647-1660
-
-
D'Luna, L.1
-
3
-
-
8344258215
-
On the design and multiplier-less realization of digital if for software radio receivers with prescribed output accuracy
-
July
-
S. Chan and K. Yeung, "On the design and multiplier-less realization of digital IF for software radio receivers with prescribed output accuracy," in Proc. Int. Conf. Digital Signal Processing, vol. 1, July 2002, pp. 277-280.
-
(2002)
Proc. Int. Conf. Digital Signal Processing
, vol.1
, pp. 277-280
-
-
Chan, S.1
Yeung, K.2
-
4
-
-
33845577275
-
A digital frequency synthesizer
-
Mar.
-
J. Tierney et al., "A digital frequency synthesizer," IEEE Trans. Audio Electroacoust., vol. 19, pp. 48-56, Mar. 1971.
-
(1971)
IEEE Trans. Audio Electroacoust.
, vol.19
, pp. 48-56
-
-
Tierney, J.1
-
6
-
-
0026382481
-
A 150-MHz direct digital frequency synthesizer in 1.25-μm CMOS with -90-dBc spurious performance
-
Dec.
-
H. Nicholas and H. Samueli, "A 150-MHz direct digital frequency synthesizer in 1.25-μm CMOS with -90-dBc spurious performance," IEEE J. Solid-State Circuits, vol. 26, pp. 1959-1969, Dec. 1991.
-
(1991)
IEEE J. Solid-state Circuits
, vol.26
, pp. 1959-1969
-
-
Nicholas, H.1
Samueli, H.2
-
7
-
-
0021479005
-
CMOS/SOS frequency synthesizer LSI circuit for spread spectrum communications
-
Aug.
-
D. Sunderland et al., "CMOS/SOS frequency synthesizer LSI circuit for spread spectrum communications," IEEE J. Solid-State Circuits, vol. 19, pp. 497-505, Aug. 1984.
-
(1984)
IEEE J. Solid-state Circuits
, vol.19
, pp. 497-505
-
-
Sunderland, D.1
-
8
-
-
0031102705
-
Methods of mapping from phase to sine amplitude in direct digital synthesis
-
Mar.
-
J. Vankka, "Methods of mapping from phase to sine amplitude in direct digital synthesis," IEEE Trans. Ultrason., Ferroelect., Freq. Contr., vol. 44, pp. 526-534, Mar. 1997.
-
(1997)
IEEE Trans. Ultrason., Ferroelect., Freq. Contr.
, vol.44
, pp. 526-534
-
-
Vankka, J.1
-
9
-
-
0033169555
-
A 100-MHz, 16-b, direct digital frequency synthesizer with a 100-dBc spurious-free dynamic range
-
Aug.
-
A. Madisetti et al., "A 100-MHz, 16-b, direct digital frequency synthesizer with a 100-dBc spurious-free dynamic range," IEEE J. Solid-State Circuits, vol. 34, pp. 1034-1043, Aug. 1999.
-
(1999)
IEEE J. Solid-state Circuits
, vol.34
, pp. 1034-1043
-
-
Madisetti, A.1
-
10
-
-
0033878416
-
Low-power direct digital frequency synthesis for wireless communications
-
Mar.
-
A. Bellaouar et al., "Low-power direct digital frequency synthesis for wireless communications," IEEE J. Solid-State Circuits, vol. 35, pp. 385-390, Mar. 2000.
-
(2000)
IEEE J. Solid-state Circuits
, vol.35
, pp. 385-390
-
-
Bellaouar, A.1
-
11
-
-
0036113801
-
Direct digital frequency synthesizers using high-order polynomial approximation
-
Feb.
-
D. De Caro et al., "Direct digital frequency synthesizers using high-order polynomial approximation," in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2002, pp. 134-135.
-
(2002)
IEEE Int. Solid-state Circuits Conf. Dig. Tech. Papers
, pp. 134-135
-
-
De Caro, D.1
-
12
-
-
0038257348
-
Interpolation based direct digital frequency synthesis for wireless communications
-
Mar.
-
A. Eltawil and B. Daneshrad, "Interpolation based direct digital frequency synthesis for wireless communications," in Proc. IEEE Wireless Commun., Network Conf., vol. 1, Mar. 2002, pp. 73-77.
-
(2002)
Proc. IEEE Wireless Commun., Network Conf.
, vol.1
, pp. 73-77
-
-
Eltawil, A.1
Daneshrad, B.2
-
13
-
-
0029267943
-
A 200 MHz quadrature digital synthesizer/mixer in 0.8 μm CMOS
-
Mar.
-
L. Tan and H. Samueli, "A 200 MHz quadrature digital synthesizer/mixer in 0.8 μm CMOS," IEEE J. Solid-State Circuits, vol. 30, pp. 193-200, Mar. 1995.
-
(1995)
IEEE J. Solid-state Circuits
, vol.30
, pp. 193-200
-
-
Tan, L.1
Samueli, H.2
-
14
-
-
84919346176
-
The CORDIC trigonometric computing technique
-
Sept.
-
J. Volder, "The CORDIC trigonometric computing technique," IRE Trans. Electron. Camput., vol. 8, pp. 330-334, Sept. 1959.
-
(1959)
IRE Trans. Electron. Camput.
, vol.8
, pp. 330-334
-
-
Volder, J.1
-
15
-
-
0026261122
-
A 540-MHz 10-b polar to Cartesian converter
-
Nov.
-
G. Gielis et al., "A 540-MHz 10-b polar to Cartesian converter," IEEE J. Solid-State Circuits, vol. 26, pp. 1645-1650, Nov. 1991.
-
(1991)
IEEE J. Solid-state Circuits
, vol.26
, pp. 1645-1650
-
-
Gielis, G.1
-
16
-
-
0036628599
-
Numerically controlled oscillators with hybrid function generators
-
July
-
I. Janiszewski et al., "Numerically controlled oscillators with hybrid function generators," IEEE Trans. Ultrason., Ferroelecl., Freq. Contr., vol. 49, pp. 995-1004, July 2002.
-
(2002)
IEEE Trans. Ultrason., Ferroelecl., Freq. Contr.
, vol.49
, pp. 995-1004
-
-
Janiszewski, I.1
-
17
-
-
0024881951
-
Efficient elementary function generation with multipliers
-
Sept.
-
H. Ahmed, "Efficient elementary function generation with multipliers," in Proc. Symp. Computer Arithmetic, Sept. 1989, pp. 52-59.
-
(1989)
Proc. Symp. Computer Arithmetic
, pp. 52-59
-
-
Ahmed, H.1
-
18
-
-
0031345204
-
Hybrid CORDIC algorithms
-
Nov.
-
S. Wang et al., "Hybrid CORDIC algorithms," IEEE Trans. Comput., vol. 46, pp. 1202-1207, Nov. 1997.
-
(1997)
IEEE Trans. Comput.
, vol.46
, pp. 1202-1207
-
-
Wang, S.1
-
19
-
-
0242526929
-
A 16b quadrature direct digital frequency synthesizer using interpolative angle rotation algorithm
-
June
-
Y. Song and B. Kim, "A 16b quadrature direct digital frequency synthesizer using interpolative angle rotation algorithm," in Symp. VLSI Circuits Dig. Tech. Papers, June 2002, pp. 146-147.
-
(2002)
Symp. VLSI Circuits Dig. Tech. Papers
, pp. 146-147
-
-
Song, Y.1
Kim, B.2
-
20
-
-
0037704386
-
A 300-MHz quadrature direct digital synthesizer/mixer in 0.25-μm CMOS
-
June
-
A. Torosyan et al., "A 300-MHz quadrature direct digital synthesizer/mixer in 0.25-μm CMOS," IEEE J. Solid-State Circuits, vol. 38, pp. 875-887, June 2003.
-
(2003)
IEEE J. Solid-state Circuits
, vol.38
, pp. 875-887
-
-
Torosyan, A.1
-
21
-
-
0141885127
-
Novel approach to the design of direct digital frequency synthesizers based on linear interpolation
-
Sept.
-
J. Langlois and D. Al-Khalili, "Novel approach to the design of direct digital frequency synthesizers based on linear interpolation," IEEE Trans. Circuits Syst. II, vol. 50, pp. 567-578, Sept. 2003.
-
(2003)
IEEE Trans. Circuits Syst. II
, vol.50
, pp. 567-578
-
-
Langlois, J.1
Al-Khalili, D.2
-
22
-
-
8344259015
-
A 330-MHz 15-b quadrature digital synthesizer/mixer in 0.25-μm CMOS
-
Sept.
-
Y. Song and B. Kim, "A 330-MHz 15-b quadrature digital synthesizer/mixer in 0.25-μm CMOS," in Proc. Eur. Solid-State Circuits Conf., Sept. 2003, pp. 513-516.
-
(2003)
Proc. Eur. Solid-state Circuits Conf.
, pp. 513-516
-
-
Song, Y.1
Kim, B.2
-
24
-
-
84893767143
-
Direct digital frequency synthesizers using first-order polynomial Chebyshev approximation
-
Sept.
-
A. Strollo et al., "Direct digital frequency synthesizers using first-order polynomial Chebyshev approximation," in Proc. Eur. Solid-State Circuits Conf., Sept. 2002, pp. 527-530.
-
(2002)
Proc. Eur. Solid-state Circuits Conf.
, pp. 527-530
-
-
Strollo, A.1
-
25
-
-
0024027811
-
The optimization of direct digital frequency synthesizer performance in the presence of finite word length effects
-
H. Nicholas et al., "The optimization of direct digital frequency synthesizer performance in the presence of finite word length effects," in Proc. Annu. Frequency Control Symp., 1988, pp. 357-363.
-
(1988)
Proc. Annu. Frequency Control Symp.
, pp. 357-363
-
-
Nicholas, H.1
-
26
-
-
0027615316
-
M × N Booth encoded multiplier generator using optimized Wallace trees
-
June
-
J. Fadavi-Ardekani, "M × N Booth encoded multiplier generator using optimized Wallace trees," in IEEE Trans. VLSI Syst., vol. 1, June 1993, pp. 120-125.
-
(1993)
IEEE Trans. VLSI Syst.
, vol.1
, pp. 120-125
-
-
Fadavi-Ardekani, J.1
-
30
-
-
84949433866
-
Analysis of the output spectrum for direct digital frequency synthesizers in the presence of phase truncation and finite arithmetic precision
-
A. Torosyan and A. Willson, "Analysis of the output spectrum for direct digital frequency synthesizers in the presence of phase truncation and finite arithmetic precision," in Proc. Int. Symp. Image and Signal Processing and Analysis, 2001, pp. 458-463.
-
(2001)
Proc. Int. Symp. Image and Signal Processing and Analysis
, pp. 458-463
-
-
Torosyan, A.1
Willson, A.2
-
31
-
-
0038645196
-
A 300 mW programmable QAM transceiver for VDSL applications
-
Feb.
-
H. Nam et al., "A 300 mW programmable QAM transceiver for VDSL applications," in IEEE Int. Solid-State Circuits Conf. Dig. Tech Papers, Feb. 2003, pp. 418-419.
-
(2003)
IEEE Int. Solid-state Circuits Conf. Dig. Tech Papers
, pp. 418-419
-
-
Nam, H.1
-
32
-
-
0032316103
-
A 70-Mb/s variable-rate 1024-QAM cable receiver IC with integrated 10-b ADC and FEC decoder
-
Dec.
-
L. Tan et al., "A 70-Mb/s variable-rate 1024-QAM cable receiver IC with integrated 10-b ADC and FEC decoder," IEEE J. Solid-State Circuits. vol. 33, pp. 2205-2218, Dec. 1998.
-
(1998)
IEEE J. Solid-state Circuits.
, vol.33
, pp. 2205-2218
-
-
Tan, L.1
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