Research on dynamic dispatching rule for semiconductor wafer fabrication

Jisuanji Jicheng Zhizao Xitong/Computer Integrated Manufacturing Systems, CIMS

Volumn 10, Issue 8, 2004, Pages 949-954

  Li, Li ^a   Qiao, Fei ^a   Jiang, Hua ^a   Wu, Qi Di ^a  

^a TONGJI UNIVERSITY   (China)

Author keywords

Cycle time; Dynamic dispatching; On time delivery rate; Semiconductor wafer fabrication; Throughout put; WIP level

Indexed keywords

KNOWLEDGE BASED SYSTEMS; MATHEMATICAL MODELS; OPTIMIZATION; SCHEDULING; SILICON WAFERS;

CYCLE TIME; DISPATCHING RULES; DYNAMIC DISPATCHING; SEMICONDUCTOR WAFER; THROUGHOUT PUT; WIP LEVEL;

SEMICONDUCTOR DEVICE MANUFACTURE;

EID: 8344219786     PISSN: 10065911     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

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