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Volumn , Issue , 2011, Pages 391-394

A complete DVB-T/ATSC tuner analog base-band implemented with a single filtering ADC

Author keywords

[No Author keywords available]

Indexed keywords

90NM CMOS; CHANNEL BANDWIDTH; DYNAMIC RANGE; FREQUENCY DEPENDENT; FULLY INTEGRATED; IN-BAND NOISE; PASSIVE FILTERING; SYSTEM REQUIREMENTS; WIRELESS RECEIVERS;

EID: 82955213966     PISSN: 19308833     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIRC.2011.6044989     Document Type: Conference Paper
Times cited : (21)

References (7)
  • 2
    • 10444270156 scopus 로고    scopus 로고
    • A Continuous-Time ΣΔ ADC with Increased Immunity to Interferers
    • December
    • K. Philips et al., "A Continuous-Time ΣΔ ADC With Increased Immunity to Interferers", IEEE J. Solid State Circuits, Vol. 39, No.12, pp. 2170-2178, December 2004.
    • (2004) IEEE J. Solid State Circuits , vol.39 , Issue.12 , pp. 2170-2178
    • Philips, K.1
  • 3
    • 79955735997 scopus 로고    scopus 로고
    • A SAW-less GSM/GPRS/EDGE Receiver Embedded in a 65nm CMOS SoC
    • IEEE International
    • Ivin Siu-Chuang Lu et al., "A SAW-less GSM/GPRS/EDGE Receiver Embedded in a 65nm CMOS SoC", Solid State Circuit Conference, 2011, ISSCC 2011, IEEE International, pp. 364.
    • Solid State Circuit Conference, 2011, ISSCC 2011 , pp. 364
    • Lu, I.S.-C.1
  • 4
    • 79955714680 scopus 로고    scopus 로고
    • A 65nm CMOS SoC with Embedded HSDPA/EDGE transceiver, Digital Baseband and Multimedia Processor
    • IEEE International
    • A. Cicalini et al., "A 65nm CMOS SoC with Embedded HSDPA/EDGE transceiver, Digital Baseband and Multimedia Processor", Solid State Circuit Conference, 2011, ISSCC 2011, IEEE International, pp. 368.
    • Solid State Circuit Conference, 2011, ISSCC 2011 , pp. 368
    • Cicalini, A.1
  • 5
    • 77956201900 scopus 로고    scopus 로고
    • Current-Mode, WCDMA Channel Filter with In-Band Noise Shaping
    • September
    • A. Pirola, A. Liscidini and R. Castello, "Current-Mode, WCDMA Channel Filter With In-Band Noise Shaping", IEEE J. Solid State Circuits, Vol. 45, No. 9, pp. 1770-1780, September 2010.
    • (2010) IEEE J. Solid State Circuits , vol.45 , Issue.9 , pp. 1770-1780
    • Pirola, A.1    Liscidini, A.2    Castello, R.3
  • 6
    • 39749115059 scopus 로고    scopus 로고
    • A 10-bit 20MHz 38mW 950MHz CT ΣΔ with a 5-bit noise-shaping VCO-based quantizer and DEM circuit in 0.13μm CMOS
    • M. Z. Straayer and M. H. Perrott, "A 10-bit 20MHz 38mW 950MHz CT ΣΔ with a 5-bit noise-shaping VCO-based quantizer and DEM circuit in 0.13μm CMOS", VLSI Symp. Dig., 2007, pp. 246-247.
    • VLSI Symp. Dig., 2007 , pp. 246-247
    • Straayer, M.Z.1    Perrott, M.H.2
  • 7
    • 70549087993 scopus 로고    scopus 로고
    • Oversampling A/D Converters with Reduced Sensitivity to DAC Nonlinearities
    • November
    • B. Pandita, K. W. Martin: "Oversampling A/D Converters With Reduced Sensitivity to DAC Nonlinearities", IEEE Transactions on Circuits and Systems-II: Express Briefs, Vol. 56, No. 11, pp. 840-844, November 2009.
    • (2009) IEEE Transactions on Circuits and Systems-II: Express Briefs , vol.56 , Issue.11 , pp. 840-844
    • Pandita, B.1    Martin, K.W.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.