A maximally-digital radio receiver front-end

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 53, Issue , 2010, Pages 450-451

  Opteynde, Frank ^a  

^a Audax Technologies   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG CIRCUITRY; DIGITAL DESIGNS; DIGITAL STANDARDS; MACRO BLOCK; SILICON TECHNOLOGIES;

ANALOG CIRCUITS; DIGITAL INTEGRATED CIRCUITS; DIGITAL LIBRARIES; RADIO BROADCASTING; RADIO RECEIVERS;

DIGITAL RADIO;

EID: 77952126830     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2010.5433952     Document Type: Conference Paper

References (7)

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2. Susan Luschas et al: "Radio Frequency Digital-to-Analog Converter", IEEE J. Solid-State Circuits,vol. 39, no. 9, pp. 1462-1467, Sept. 2004.
3. Bagheri et al: "An 800MHz-to-6GHz Software-Defined Wireless Receiver in 90nm CMOS", IEEE J. Solid-State Circuits,vol. 41, no. 12, pp. 2860-2875, Dec. 2006.
4. J. Mitola: "The Software Radio Architecture", IEEE Comm. Mag., vol. 33, no. 5, pp. 26-38, May 1995.
5. Takamoto Watanabe et al: "An All-Digital Analog-to-Digital Converter with 12μV/LSB Using Moving-Average Filtering", IEEE J. Solid-State Circuits,vol. 28, no. 1, pp. 120-125, Jan. 2003.
6. Mats Hovin et al: "Delta-Sigma Modulators Using Frequency-Modulated Intermediate Values", IEEE J. Solid-State Circuits, vol. 32, no. 1, pp. 16-22, Jan. 1997.
7. Stephan Henzler et al: "A Local Passive Time Interpolation Concept for Variation-Tolerant High-Resolution Time-to-Digital Conversion", IEEE J. Solid-State Circuits,vol. 43, no. 7, pp. 1666-1676, July 2008.