60-GHz single-chip integrated antenna and low noise amplifier in 65-nm CMOS SOI technology for short-range wireless Gbits/s applications

International Conference on Applied Electronics

Volumn , Issue , 2011, Pages 127-132

  Fonte, A ^a   Saponara, S ^a   Pinto, G ^a   Fanucci, L ^a   Neri, B ^a  

^a UNIVERSITY OF PISA   (Italy)

Author keywords

60 GHz; CMOS Silicon On Insulator (SOI); Integrated antenna; LNA (low noise amplifier); Wireless Gbits s

Indexed keywords

60-GHZ; ANTENNA GAINS; BULK SILICON TECHNOLOGY; CMOS SILICON ON INSULATOR (SOI); CMOS SOI TECHNOLOGY; CO-DESIGNS; COPLANAR STRIPS; HIGH-RESISTIVITY SUBSTRATE; INPUT MATCHING; INTEGRATED ANTENNAS; ON CHIP ANTENNA; ON CHIPS; POWER GAINS; SILICON-ON-INSULATORS; SINGLE-CHIP; TWO STAGE; WIRELESS TRANSCEIVER;

ANTENNAS; INTEGRATION; SILICON ON INSULATOR TECHNOLOGY;

LOW NOISE AMPLIFIERS;

EID: 82455164608     PISSN: 18037232     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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