Algorithms and tools for network on chip based system design

Proceedings - 16th Symposium on Integrated Circuits and Systems Design, SBCCI 2003

Volumn , Issue , 2003, Pages 163-168

  Lei, Tang ^a   Kumar, S ^a  

^a JÖNKÖPING UNIVERSITY   (Sweden)

Author keywords

Application software; Communication switching; Concurrent computing; Delay; Genetic algorithms; Mesh generation; Network on a chip; Spine; Switches; System on a chip

Indexed keywords

ALGORITHMS; APPLICATION PROGRAMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTATIONAL COMPLEXITY; COMPUTATIONAL EFFICIENCY; DATA COMPRESSION; DESIGN; DISTRIBUTED COMPUTER SYSTEMS; GENETIC ALGORITHMS; INTEGRATED CIRCUITS; MAPPING; MESH GENERATION; MICROPROCESSOR CHIPS; NETWORK-ON-CHIP; REUSABILITY; SERVERS; SWITCHES; SYSTEM-ON-CHIP; SYSTEMS ANALYSIS; VLSI CIRCUITS;

COMMUNICATION SWITCHING; CONCURRENT COMPUTING; DELAY; NETWORK ON A CHIP; SPINE; SYSTEM ON A CHIP;

INTEGRATED CIRCUIT DESIGN;

EID: 80555133327     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SBCCI.2003.1232823     Document Type: Conference Paper

References (7)

1. Luca Benini, and Giovanni De Micheli, "Network on Chips: A New SoC Paradigm", IEEE Computer, January 2002, pp. 70-78.
2. Axel Jantsch, and Hannu Tenhunen (Editors), Networks on Chip, Kluwer Academic Publishers, Boston, USA, January 2003.
3. th Design Automation Conference, ACM/IEEE, Las Vegas, Nevada, USA, June 2001, pp. 684-689.
4. Himanshu Bhatnagar, Advanced ASIC Chip Synthesis: Using Synopsys Design Compiler and Primetime, Kluwer Academic Publishers, Boston, USA, June 29, 1999.
5. th International Conference on VLSI Design 2003, IEEE, New Delhi, India, January 2003, pp. 401-408.
6. th International Workshop on Hardware/software Co-design, Seattle, Washington, USA, March 1998, pp.97-101.
7. John H. Holland, Adaptation in Natural and Artificial Systems, MIT Press, Cambridge, MA, second edition, 1992.