Circuit implementation of piecewise-affine functions based on lattice representation

2011 20th European Conference on Circuit Theory and Design, ECCTD 2011

Volumn , Issue , 2011, Pages 644-647

  Martinez Rodriguez M C ^a,b   Baturone, I ^a,b   Brox, P ^b  

^a UNIVERSITY OF SEVILLE   (Spain)

^b INSTITUTO DE MICROELECTRÓNICA DE SEVILLA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT IMPLEMENTATION; DIGITAL ARCHITECTURE; LATTICE APPROACHES; LATTICE REPRESENTATION; LATTICE THEORIES; NON LINEAR CONTROL; REPRESENTATION METHOD; XILINX FPGA;

LINEAR CONTROL SYSTEMS;

CIRCUIT THEORY;

EID: 80155132329     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECCTD.2011.6043625     Document Type: Conference Paper

References (15)

1. C. Kahlert and L. O. Chua, A generalized canonical piecewise-linear representation, IEEE Trans. on Circuits and Systems, vol. 37, no. 3, pp. 373-383, 1990.
2. J. Ramírez-Angulo, E. Sánchez-Sinencio, A. Rodríguez-Vázquez, A piecewise linear function approximation using current-mode circuits, IEEE Int. Conf. on Circ. and Systems, pp. 2021-2024, San Diego CA, May 1992.
3. A. Oliveri, T. Poggi, M. Storace, Circuit implementation of piecewise-affine functions based on a binary search tree, European Conference on Circuit Theory and Design, 2009. ECCTD 2009, pp.145-148, Aug. 2009.
4. R. Rovatti, C. Fantuzzi, S. Simani, High-speed DSP-based implementation of piecewise-affine and piecewise-quadratic fuzzy systems, Signal Processing, vol. 80, no. 6, pp. 951-963, June 2000.
5. J. P. Echevarria, M. Martínez, J. Echanobe, I. del Campo, J. Tarela, Digital hardware implementation of high dimensional fuzzy systems, Applications of Fuzzy Sets Theory, Springer, pp. 245252, 2007.
6. R. Rovatti, M. Borgatti, R. Guerrieri, A geometric approach to maximum-speed n-dimensional continuous linear interpolation in rectangular grids, IEEE Trans. on Computers, vol. 47, no. 8, pp. 894-899, Aug. 1998. (Pubitemid 128738523)
7. M. Storace, T. Poggi, Digital architectures realizing piecewise-linear multi-variate functions: two FPGA implementations, Int. J. Circ. Th. Appl., vol. 39, no. 1, pp. 1-15, 2009.
8. T. Poggi, F. Comaschi, M. Storace, Digital circuit realization of piecewise affine functions with non-uniform resolution: theory and FPGA implementation, IEEE Trans. on Circuits and Systems II, vol. 52, no. 2, pp. 131135, 2010.
9. I. Baturone, M. C. Martínez-Rodríguez, P. Brox, A. Gersnoviez, S. Sánchez-Solano, Digital implementation of hierarchical Piecewise-Affine Controllers, 20th IEEE Int. Symp. on Industrial Electronics (ISIE), pp. 1497-1502, June 2011.
10. A. Bemporad, M. Morari, V. Dua, E. N. Pistikopoulos, The explicit linear quadratic regulator for constrained systems, Automatica, vol. 38, no. 1, pp. 3-20, January 2002. (Pubitemid 33034535)
11. P. Tondel, T. A. Johansen, A. Bemporad, Evaluation of piecewise affine control via binary search tree, Automatica, vol. 39, no. 5, pp. 945-950, May 2003.
12. P. Julian, A. Desages, O. Agamennoni, High-level canonical piecewise linear representation using a simplicial partition, IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, vol.46, no.4, pp. 463-480, Apr. 1999. (Pubitemid 32262741)
13. J. M. Tarela, M. V. Martinez, Region configurations for realizability of lattice Piecewise-Linear models, Mathematical and Computer Modelling, vol. 30, no. 11-12, pp. 75-83, Dec. 1999.
14. C. Wen, X. Ma, B. E. Ydstie, Analytical expression of explicit MPC solution via lattice piecewise-affine function, Automatica, vol. 45, no. 4, pp. 910-917, Apr. 2009.
15. Hybrid Toolbox:http://www.ing.unitn.it/ bemporad/hybrid/toolbox, 2004.