Test structure and method for the experimental investigation of internal voltage amplification and surface potential of ferroelectric MOSFETs

Solid-State Electronics

Volumn 65-66, Issue 1, 2011, Pages 151-156

  Rusu, Alexandru ^a   Salvatore, Giovanni A ^a   Ionescu, Adrian M ^a  

^a EPFL   (Switzerland)

Author keywords

Ferroelectric; Negative capacitance; P(VDF TrFE); Polarization; PVDF; Surface potential; Test structure

Indexed keywords

AL CONTACT; CAPACITIVE MEASUREMENTS; DIFFERENTIAL VOLTAGE; ELECTRICAL CHARACTERIZATION; EXPERIMENTAL INVESTIGATIONS; FERROELECTRIC; FERROELECTRIC LAYERS; FIRST ORDER; INTERNAL NODES; INTERNAL VOLTAGE; METAL CONTACTS; MOSFETS; NEGATIVE CAPACITANCE; NEGATIVE CAPACITANCE EFFECT; P-TYPE; POLARIZATION LOOPS; PVDF; STRONG INVERSION; SUBTHRESHOLD SLOPE; TEST STRUCTURE;

AMPLIFICATION; CAPACITANCE; FERROELECTRICITY; INVESTMENTS; MESFET DEVICES; POLARIZATION; SURFACE POTENTIAL; SURFACE PROPERTIES; TRANSISTOR TRANSISTOR LOGIC CIRCUITS; TRANSISTORS;

SURFACE STRUCTURE;

EID: 80054028429     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2011.06.038     Document Type: Conference Paper

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