Spatial hardware implementation for sparse graph algorithms in graphstep

ACM Transactions on Autonomous and Adaptive Systems

Volumn 6, Issue 3, 2011, Pages

  Delorimier, Michael ^a   Kapre, Nachiket ^a   Mehta, Nikil ^a   Dehon, André ^a  

^a UNIVERSITY OF PENNSYLVANIA   (United States)

Author keywords

Compute model; Graph algorithm; Graphstep; Parallel programming; Spatial computing

Indexed keywords

COMMUNICATION STRUCTURES; COMPUTE MODEL; DOMAIN SPECIFIC; GRAPH ALGORITHMS; GRAPH EDGES; GRAPH OPTIMIZATION; GRAPHSTEP; HARDWARE IMPLEMENTATIONS; LANGUAGE SYNTAX; MASSIVELY PARALLEL MACHINE; PARALLEL OPERATIONS; PARALLEL SYNCHRONIZATION; SEMANTIC NETWORK; SHORTEST-PATH; SPARSE GRAPHS; SPATIAL COMPUTING; TOTAL SPEEDUPS;

ALGORITHMS; COMMUNICATION; HARDWARE; MATHEMATICAL MODELS; PARALLEL PROGRAMMING; SEMANTICS;

GRAPH THEORY;

EID: 80053482073     PISSN: 15564665     EISSN: 15564703     Source Type: Journal    
DOI: 10.1145/2019583.2019584     Document Type: Article

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