Rigel: A 1,024-core single-chip accelerator architecture

IEEE Micro

Volumn 31, Issue 4, 2011, Pages 30-41

  Johnson, Daniel R ^a   Johnson, Matthew R ^a   Kelm, John H ^a   Tuohy, William ^a   Lumetta, Steven S ^a   Patel, Sanjay J ^a  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

Author keywords

multicore; multiple data processors; Multiple data stream architectures (multiprocessors); multiple instruction; parallel architectures; parallel processors; single chip multiprocessors

Indexed keywords

MULTI CORE; MULTIPLE DATA; MULTIPLE DATA-STREAM ARCHITECTURES (MULTIPROCESSORS); MULTIPLE INSTRUCTIONS; PARALLEL PROCESSOR; SINGLE-CHIP MULTIPROCESSORS;

MICROPROCESSOR CHIPS; PARALLEL ARCHITECTURES;

PARALLEL PROCESSING SYSTEMS;

EID: 79961089172     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/MM.2011.40     Document Type: Article

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