FPGA implementation of a spiking neural network for pattern matching

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2011, Pages 649-652

  Caron, Louis Charles ^a   Mailhot, Frederic ^a   Rouat, Jean ^a  

^a UNIVERSITÉ DE SHERBROOKE   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

FIELD-PROGRAMMABLE GATE ARRAY IMPLEMENTATIONS; FPGA IMPLEMENTATIONS; FULLY CONNECTED NETWORKS; FUNCTIONAL BLOCK; LEAKY INTEGRATE AND FIRE NEURON; RESOURCE USAGE; SPIKING NEURAL NETWORKS; WHOLE SYSTEMS;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA); IMAGE RECOGNITION; NETWORKS (CIRCUITS); PATTERN MATCHING; SIGNAL PROCESSING;

NEURAL NETWORKS;

EID: 79960885023     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2011.5937649     Document Type: Conference Paper

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