SCOPUS 정보 검색 플랫폼

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2011, Pages 1657-1661

Effect of blind hole depth and shape of solder joint on the reliability of through silicon via (TSV)

(3) Wan, Zhimin a Luo, Xiaobing a,b Liu, Sheng a,b

a HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY (China)

b HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY (China)

Author keywords

[No Author keywords available]

Indexed keywords

BLIND HOLES; CRITICAL LOCATION; EQUIVALENT PLASTIC STRAIN; SOLDER JOINTS; SPHERICAL JOINT; STRESS AND STRAIN; THERMAL-MECHANICAL RELIABILITY; THROUGH-SILICON-VIA;

FINITE ELEMENT METHOD; FLANGES; INTERFACES (MATERIALS); INVESTMENTS; PLASTIC DEFORMATION; THERMAL EXPANSION;

RELIABILITY;

EID: 79960408275 PISSN: 05695503 EISSN: None Source Type: Conference Proceeding
DOI: 10.1109/ECTC.2011.5898734 Document Type: Conference Paper

Times cited : (6)

References (4)

1
- 70349675218
- Failure mechanisms and optimum design for electroplated copper through-silicon vias (TSV)
- California USA, May 25-29
- Xi Liu, Qiao Chen, Pradeep Dixit, Ritwik Chatterjee, Rao R. Tummala, and Suresh K. Sitaraman, "Failure Mechanisms and Optimum Design for Electroplated Copper Through-Silicon Vias (TSV) ", Proceedings of the 59th IEEE Electronic Components and Technology Conference San Diego, California USA, pp. 624-629, May 25-29, 2009
- (2009) Proceedings of the 59th IEEE Electronic Components and Technology Conference San Diego , pp. 624-629
- Liu, X.¹ Chen, Q.² Dixit, P.³ Chatterjee, R.⁴ Tummala, R.R.⁵ Sitaraman, S.K.⁶

2
- 51349168308
- Nonlinear thermal stress/strain analyses of copper filled TSV (Through Silicon Via) and their flip-chip microbumps
- Orlando, FL, May 27-30
- Cheryl S. Selvanayagam, John H. Lau, Xiaowu Zhang, S. K. W. Seah, Kripesh Vaidyanathan and T. C. Chai, "Nonlinear Thermal Stress/Strain Analyses of Copper Filled TSV (Through Silicon Via) and their Flip-Chip Microbumps", Proceedings of the 58th IEEE Electronic Components and Technology Conference, pp. 1073-1081, Orlando, FL, May 27-30, 2008.
- (2008) Proceedings of the 58th IEEE Electronic Components and Technology Conference , pp. 1073-1081
- Selvanayagam, C.S.¹ Lau, J.H.² Zhang, X.³ Seah, S.K.W.⁴ Vaidyanathan, K.⁵ Chai, T.C.⁶

3
- 71049156341
- TSV stress testing and modeling for 3D IC applications
- China
- Thenappan Chidambaram, Colin McDonough, Rober Geer, and Wei Wang, "TSV Stress Testing and Modeling for 3D IC Applications", Proceedings of the 16th IEEE IPFA, pp. 727-730 China 2009
- (2009) Proceedings of the 16th IEEE IPFA , pp. 727-730
- Chidambaram, T.¹ McDonough, C.² Geer, R.³ Wang, W.⁴

4
- 77955187970
- Thermal stress induced delamination of through silicon vias in 3-D interconnects
- las vegas, Nevada, June1-4
- Kuan H. Lu, Suk-Kyu Ryu, Qiu Zhao, Xuefeng Zhang, Jay Im, Rui Huang, and Paul S. Ho, "Thermal Stress Induced Delamination of Through Silicon Vias in 3-D Interconnects", Proceedings of the 60h IEEE Electronic Components and Technology Conference, pp. 40-45, las vegas, Nevada, June1-4, 2010
- (2010) Proceedings of the 60h IEEE Electronic Components and Technology Conference , pp. 40-45
- Lu, K.H.¹ Ryu, S.-K.² Zhao, Q.³ Zhang, X.⁴ Im, J.⁵ Huang, R.⁶ Ho, P.S.⁷

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.