|
Volumn , Issue , 2011, Pages 1183-1189
|
Expert advisor for integrated virtual manufacturing and reliability for TSV/SiP based modules
|
Author keywords
[No Author keywords available]
|
Indexed keywords
BONDING PROCESS;
CHEMICAL-MECHANICAL PLANARIZATION;
COPPER ELECTROPLATING;
ELECTROMIGRATION TESTING;
ELECTRONIC DEVICE;
EMERGING TRENDS;
FORMATION PROCESS;
HIGH ASPECT RATIO VIA;
HIGH COSTS;
HIGH-VOLUME PRODUCTION;
IC PACKAGE;
INNOVATIVE DESIGN;
MANUFACTURING PROCESS;
MATERIAL PROPERTY;
MATERIAL PROPERTY CHARACTERIZATION;
MEMS PACKAGING;
MODELING TECHNIQUE;
NUMERICAL MODELING;
NUMERICAL SIMULATION MODELS;
RELIABILITY DESIGN;
SUBMICRON;
TECHNICAL CHALLENGES;
THERMAL MECHANICAL ANALYSIS;
THROUGH SILICON VIAS;
TIME TO MARKET;
TRIAL-AND-ERROR METHOD;
VIRTUAL MANUFACTURING;
VIRTUAL PROTOTYPING;
WAFER THINNING;
AGILE MANUFACTURING SYSTEMS;
ASPECT RATIO;
COMPUTER SIMULATION;
DESIGN;
DYNAMIC ANALYSIS;
DYNAMIC MECHANICAL ANALYSIS;
INDUSTRIAL APPLICATIONS;
INTEGRATION;
INTERCONNECTION NETWORKS;
MATERIALS PROPERTIES;
MECHANICAL PROPERTIES;
NUMERICAL METHODS;
PACKAGING;
PROFITABILITY;
SILICON WAFERS;
TECHNOLOGY;
RELIABILITY;
|
EID: 79960385544
PISSN: 05695503
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/ECTC.2011.5898660 Document Type: Conference Paper |
Times cited : (2)
|
References (10)
|