Strategies for single patterning of contacts for 32nm and 28nm technology

ASMC (Advanced Semiconductor Manufacturing Conference) Proceedings

Volumn , Issue , 2011, Pages

  Morgenfeld, Bradley ^a   Stobert, Ian ^a   Haffner, Henning ^d   An, Juj ^a   Kanai, Hideki ^b   Ostermayr, Martin ^d   Chen, Norman ^c   Aminpur, Massud ^a   Brodsky, Colin ^a   Thomas, Alan ^a  

^a IBM RESEARCH   (United States)

^b Toshiba America Inc   (United States)

^c IBM MICROELECTRONICS   (United States)

^d INFINEON TECHNOLOGIES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

193-NM IMMERSION; CONTACT PROCESS; DATA PREPARATION; HIGH-PERFORMANCE TECHNOLOGIES; JUST IN TIME; NOVEL DESIGN; PATTERNING PROCESS; PERFORMANCE METRICS; STRUCTURAL VARIABILITY; TECHNOLOGY NODES; TECHNOLOGY PROGRAMS; TECHNOLOGY ROADMAPS;

NANOTECHNOLOGY; SEMICONDUCTOR DEVICE MANUFACTURE; TECHNOLOGY;

MANUFACTURE;

EID: 79960342822     PISSN: 10788743     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASMC.2011.5898207     Document Type: Conference Paper

References (4)

1. Morgenfeld, B., Stobert, I., An, J., Kanai, H., Chen, N., Aminpur, M., Brodsky, C., Thomas, A., "Contact patterning strategies for 32nm and 28nm technology" in Optical Microlithography XXIV, edited by Mircea V. Dusa, Proceedings of SPIE Vol. 7973 (SPIE, Bellingham, WA 2011) 797319.
2. Haffner, H., Ostermayr, M., Kanai, H., Chang, C. S., Morgenfeld, B., An, J., Luo, M., Zhuang, H., "Single exposure contacts are dead: long live single exposure contacts" in Design for Manufacturability through Design-Process Integration V, edited by Michael L. Rieger, Proceedings of SPIE Vol. 7974 (SPIE, Bellingham, WA 2011) 79740E.
3. Brodsky, C., Chu, W.", Lithography budget analysis at the process module level", Proc. SPIE 6154, 61543Y (2006).
4. H. Kawasaki, M. Khater, M. Guillorn, N. Fuller, J. Chang, S. Kanakasabapathy, L. Chang, R. Muralidhar, K. Babich, Q. Yang, J. Ott, D. Klaus, E. Kratschmer, E. Sikorski, R. Miller, R. Viswanathan, Y. Zhang, J. Silverman, Q. Ouyang, A. Yagishita, M. Takayanagi, W. Haensch, K. Ishimaru: "Demonstration of highly scaled FinFET SRAM cells with high-κ/metal gate and investigation of characteristic variability for the 32 nm node and beyond", Proc. Electron Devices Meeting, 2008. IEDM 2008.