A flip-chip-packaged 25.3 dBm class-D outphasing power amplifier in 32 nm CMOS for WLAN application

IEEE Journal of Solid-State Circuits

Volumn 46, Issue 7, 2011, Pages 1596-1605

  Xu, Hongtao ^a   Palaskas, Yorgos ^a   Ravi, Ashoke ^a   Sajadieh, Masoud ^a   El Tanani, Mohammed A ^a   Soumyanath, Krishnamurthy ^a  

^a INTEL CORPORATION   (United States)

Author keywords

class D; CMOS PA; OFDM; Outphasing; power amplifier; SOC; WLAN

Indexed keywords

CLASS-D; CMOS PA; OUTPHASING; SOC; WLAN;

BANDPASS FILTERS; CMOS INTEGRATED CIRCUITS; EFFICIENCY; FLIP CHIP DEVICES; IMPACT RESISTANCE; PROGRAMMABLE LOGIC CONTROLLERS;

POWER AMPLIFIERS;

EID: 79959770174     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2011.2143930     Document Type: Conference Paper

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