A highly linear 25dBm outphasing power amplifier in 32nm CMOS for WLAN application

ESSCIRC 2010 - 36th European Solid State Circuits Conference

Volumn , Issue , 2010, Pages 306-309

  Xu, Hongtao ^a   Palaskas, Yorgos ^a   Ravi, Ashoke ^a   Soumyanath, Krishnamurthy ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AVERAGE POWER; BACK-OFF; CLASS-D; DIGITAL CMOS; OUTPHASING; REDUCED LOSS; SWITCHING SPEED; TOTAL EFFICIENCY; TRANSFORMER POWER; WLAN APPLICATIONS;

CMOS INTEGRATED CIRCUITS; POWER AMPLIFIERS;

COST EFFECTIVENESS;

EID: 78650351224     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIRC.2010.5619705     Document Type: Conference Paper

References (10)

1. H. Chireix, "High Power Outphasing Modulation" Proc. IRE, vol. 23, no. 11, pp. 1370-1392, Nov. 1935.
2. F. Raab, "Efficiency of Outphasing RF Power-Amplifier Systems," in Communications, IEEE Transactions on, vol. 33, pp. 1094-1099, 1985.
3. H. Xu, et al., "A 28.1dBm class-D outphasing power amplifier in 45nm LP digital CMOS," in Symp. VLSI Circuits Dig. Tech. Papers, Jun. 2009, pp. 206-207.
4. B. Shi, L. Sundstrom, "Investigation of a highly efficient LINC amplifier topology", Vehicular Technology Conference, vol. 2, pp. 1215-1219, Oct. 2001.
5. J. Yao, S. Long, "Power Amplifier Selection for LINC Applications", Trans. on Circuits and Systems, vol 53, no 8, pp. 763-767, Aug. 2006.
6. nd generation high-k/metal gate transistors optimized for ultra low power, high performance, and high density product applications ", IEEE IEDM Tech. Dig., pp. 1-4, Dec. 2009.
7. I. Hakala, et al., "A 2.14-GHz Chireix outphasing transmitter", Trans. on Microwave Theory and Techniques, vol. 53, no 6, part 2, pp. 2129-2138, June 2005.
8. A. Afsahi, et al., "Fully integrated dual-band power amplifiers with on-chip baluns in 65nm CMOS for an 802.11n MIMO WLAN SoC", IEEE RFIC Symp. Dig., pp. 677-680, June 2009.
9. M. Terrovitis, et al., "A 1x1 802.11n WLAN SoC with fully integrated RF front-end utilizing PA linearization", in Proc. of ESSCIRC, pp. 224-227, Sept 2009.
10. O. Degani, et al., "A 1x2 MIMO Multi-Band CMOS Transceiver with an Integrated Front-End in 90nm CMOS for 802.11a/g/n WLAN Applications", IEEE ISSCC Dig. Tech. Papers, pp. 356-619, Feb 2008