Opportunities and challenges of FinFET as a device structure candidate for 14nm node CMOS technology

ECS Transactions

Volumn 34, Issue 1, 2011, Pages 81-86

  Yamashita, T ^a   Basker, V S ^a   Standaert, T ^a   Yeh, C C ^a   Faltermeier, J ^a   Yamamoto, T ^a   Lin, C H ^a   Bryant, A ^a   Maitra, K ^a   Kulkarni, P ^a   Kanakasabapathy, S ^a   Sunamura, H ^a   Wang, J ^a   Jagannathan, H ^a   Inada, A ^a   Cho, J ^a   Miller, R ^a   Doris, B ^a   Paruchuri, V ^a   Bu, H ^a   Khare, M ^a   O'Neill, James ^a   Leobandung, E ^a   more..

^a IBM RESEARCH   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS TECHNOLOGY; DEVICE STRUCTURES; FINFET DEVICES; GATE FIRST; GATE LENGTH; HIGH DRIVE CURRENT; KEY PROCESS; SHORT CHANNELS;

CMOS INTEGRATED CIRCUITS; GATES (TRANSISTOR); NANOTECHNOLOGY; SEMICONDUCTOR DEVICE MANUFACTURE; TECHNOLOGY;

INTEGRATED CIRCUITS;

EID: 79959656645     PISSN: 19385862     EISSN: 19386737     Source Type: Conference Proceeding    
DOI: 10.1149/1.3567563     Document Type: Conference Paper

References (4)

1. W. Haensch, E. Nowak, R. Dennard, P. Solomon, A. Bryant, O.Dokumaci, A. Kumar, X. Wang, J. Johnson and M. Fischetti, IBM J. Res. Dev., vol. 50, p. 339(2006)
2. M. Guillorn, J. Chang, A. Bryant, N. Fuller, O. Dokumaci, X. Wang, J. Newbury, K. Babich, J. Ott, B. Haran, R. Yu, C. Laovie, D. Klaus, Y.Zhang, E. Sikorski, W. Graham, B. To, M. Lofaro, J. Tornello, D. Koli, B. Yang, A. Pyzyna, D. Neumeyer, M. Khater, A. Yagishita, H. Kawasaki and W. Haensch, Symp. VLSI Tech. p. 12(2008)
3. V. S. Basker, T. Standaert, H. Kawasaki, C.-C. Yeh, K. Maitra, T. Yamashita, J. Faltermeier, H. Adhikari. H. Jagannathan, J. Wang, H. Sunamura†, S. Kanakasabapathy, S. Schmitz, J. Cummings, A. Inada, C. -H. Lina, P. Kulkarni, Y. Zhua, J. Kuss, T. Yamamoto†, A. Kumara, J. Wahl, A. Yagishita, L. F. Edge, R. H. Kim, E. Mclellan, S. J. Holmes, R. C. Johnson, T. Levin, J. Demarest, M. Hane, M. Takayanagi, M. Colburn, V. K. Paruchuri, R. J. Miller, H. Bu, B. Doris, D. McHerron, E. Leobandung and J. O'Neill, Symp. VLSI Tech. p. 19(2009)
4. H. Kawasaki, V.S. Basker, T. Yamashita, C-H. Lin, Y. Zhu, J. Faltermeier, S. Schmitz, S. Kanakasabapathy, H. Adhikari, H. Jagannathan, A. Kumar, K. Maitra, J. Wang, C-C. Yeh, C. Wang, M. Khater, M. Guillorn, N. Fuller, J. Chang, L. Chang, R. Muralidhar, A. Yagishita, R. Miller, Q. Ouyang, Z. Zhang, V.K. Paruchuri, H. Bu, B. Doris, M. Takayanagi, W. Haensch, D. McHerron, J. O'Neill and K. Ishimaru, IEDM Tech. Dig., 289 (2009).