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Volumn , Issue , 2011, Pages

Investigation of ultra thin polycrystalline silicon channel for vertical NAND flash

Author keywords

grain boundary; thin film transistor; ultra thin polycrystalline silicon; vertical NAND flash

Indexed keywords

CHANNEL THICKNESS; EFFECTIVE MOBILITIES; GRAIN SIZE; NAND FLASH; NAND FLASH MEMORY; ON CURRENTS; POLY-CRYSTALLINE SILICON; POLYCRYSTALLINE SILICON (POLY-SI); RELIABILITY PROPERTIES; SUBTHRESHOLD; TRANSFER CHARACTERISTICS; ULTRA-THIN;

EID: 79959318485     PISSN: 15417026     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IRPS.2011.5784464     Document Type: Conference Paper
Times cited : (30)

References (7)
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  • 5
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  • 6
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    • Charge pumping in thin film transistors
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    • Saks, N.S.1    Batrab, S.2    Manning, M.3
  • 7
    • 65949097267 scopus 로고    scopus 로고
    • Geometric effect elimination and reliable trap state density extraction in charge pumping of polysilicon thin-film transistors
    • L. Lu, M. Wang and M. Wong, "Geometric effect elimination and reliable trap state density extraction in charge pumping of polysilicon thin-film transistors," IEEE Electron Device Lett. vol. 30, pp. 517-519, 2009.
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    • Lu, L.1    Wang, M.2    Wong, M.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.