A 4Mb conductive-bridge resistive memory with 2.3GB/s read-throughput and 216MB/s program-throughput

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2011, Pages 210-211

  Otsuka, Wataru ^a   Miyata, Koji ^a   Kitagawa, Makoto ^a   Tsutsui, Keiichi ^a   Tsushima, Tomohito ^a   Yoshihara, Hiroshi ^a   Namise, Tomohiro ^a   Terao, Yasuhiro ^a   Ogata, Kentaro ^a  

^a SONY CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

FERROELECTRIC RAM; FUNCTIONAL PROGRAMMING; MEMORY ARCHITECTURE; NONVOLATILE STORAGE; RRAM; SOFTWARE TESTING;

COMPUTING DEVICES; FUNCTIONAL DEVICES; LOW OPERATING VOLTAGE; NON-VOLATILE MEMORY TECHNOLOGY; RESISTIVE MEMORY; RESISTIVE MEMORY (RERAM); ROBUST RELIABILITY; STORAGE AND ACCESS;

MACROS;

EID: 79955725340     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2011.5746286     Document Type: Conference Paper

References (6)

1. H.Shiga, et al., "A 1.6GB/s DDR2 128Mb Chain FeRAM with Scalable Octal Bitline and Sensing Scheme," ISSCC Dig. Tech. Papers, pp.464-465, Feb. 2009.
2. G.Sandre, et al., "A 90nm 4Mb Embedded Phase-Change Memory with 1.2V 12ns Read Access Time and 1MB/s Write Throughput," ISSCC Dig. Tech. Papers,pp.268-269, Feb. 2010.
3. Y.Lin, et al., "A Novel TiTe Buffered Cu-GeSb Te/SiO2 Electrochemical Resistive Memory (ReRAM)," Dig. Symp. VLSI Technology, pp.91-92, June 2010.
4. yO Resistive Memory in Logic Technology with Excellent Data Retention Distribution for Embedded Applications," Dig. Symp. VLSI Technology,pp. 89-90, June 2010.
5. S.Kawabata, et al., "CoOx-RRAM Memory Cell Technology using Recess Structure for 128Kbits Memory Array," IEEE International Memory Workshop, pp. 60-61, May 2010.
6. K.Aratani, et al., "A Novel Resistance Memory with High Scalability and Nanosecond Switching," IEDM Dig. Tech. Papers,pp. 783-786, Dec. 2007.