A 2.5GHz 32nm 0.35mm2 3.5dB NF -5dBm P1dB fully differential CMOS push-pull LNA with integrated 34dBm T/R switch and ESD protection

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2011, Pages 55-57

  Fu, Chang Tsung ^a   Lakdawala, Hasnain ^a   Taylor, Stewart S ^a   Soumyanath, Krishnamurthy ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DIGITAL RADIO; ELECTRIC INDUCTORS; ELECTRONICS PACKAGING; ELECTROSTATIC DEVICES; ELECTROSTATIC DISCHARGE; FLIP CHIP DEVICES; PROGRAMMABLE LOGIC CONTROLLERS; SYSTEM-ON-CHIP; TRANSFORMER PROTECTION;

FULLY DIFFERENTIAL; HIGH POWER HANDLINGS; HIGH-K METAL GATES; OUT OF BAND REJECTION; PUSH-PULL TOPOLOGY; RELIABILITY CONSTRAINTS; TRANSFORMER COUPLED; TRANSMIT/RECEIVE SWITCHES;

LOW NOISE AMPLIFIERS;

EID: 79955705359     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2011.5746217     Document Type: Conference Paper

References (4)

1. J.-H. C. Zhan, S. S. Taylor, "A 5 GHz resistive-feedback CMOS LNA for low-cost multi-standard application," ISSCC Dig. Tech. Papers, pp.721-722, Feb. 2006.
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3. C.-H. Jan, et al., "A 32nm SoC platform technology with 2nd generation high-k/ metal gate transistors optimized for ultra low power, high performance, and high density product applications ", IEDM Tech. Dig., pp. 1-4, Dec. 2009.
4. D. Im et al, "A wideband CMOS low noise amplifier employing noise and IM2 distortion cancellation for a digital TV tuner," IEEE JSSC, vol. 44, pp. 686-698, Mar. 2009.