A fully integrated ultra-low insertion loss T/R switch for 802.11b/g/n application in 90 nm CMOS process

IEEE Journal of Solid-State Circuits

Volumn 44, Issue 5, 2009, Pages 1352-1360

  Kidwai, Adil A ^a   Fu, Chang Tsung ^b   Jensen, Jonathan C ^a   Taylor, Stewart S ^a  

^a INTEL CORPORATION   (United States)

^b NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

CMOS; T R switch; Transceiver; Wireless LAN

Indexed keywords

90NM CMOS; BASE BANDS; CMOS; DEEP N-WELL; DIE AREA; FULLY INTEGRATED; LOW INSERTION LOSS; RECEIVE MODE; SUBSTRATE ISOLATION; T/R SWITCH; TRANSMIT-MODE; WIRELESS LAN;

BANDPASS FILTERS; INSERTION LOSSES; TRANSCEIVERS;

WIRELESS LOCAL AREA NETWORKS (WLAN);

EID: 66149158231     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2009.2015813     Document Type: Conference Paper

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