Energy-efficient matrix multiplication on FPGAs

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 2438 LNCS, Issue , 2002, Pages 534-544

  Jang, Ju Wook ^a   Choi, Seonil ^b   Prasanna, Viktor K ^b  

^a Sogang University   (South Korea)

^b University of Southern California   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ARCHITECTURAL DESIGN; COMPUTATION THEORY; ENERGY DISSIPATION; ENERGY EFFICIENCY; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); MATRIX ALGEBRA; RECONFIGURABLE ARCHITECTURES;

ALGORITHMIC LEVELS; ENERGY EFFICIENT; ENERGY PERFORMANCE; FPGA DEVICES; MATRIX MULTIPLICATION; OPTIMIZED DESIGNS; STATE OF THE ART;

INTEGRATED CIRCUIT DESIGN;

EID: 79955164420     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-46117-5_56     Document Type: Conference Paper

References (11)

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