Silicon-on-silicon (Sos): A new cmos compatible low-temperature mems process using plasma activated fusion bonding

Technical Digest - Solid-State Sensors, Actuators, and Microsystems Workshop

Volumn , Issue , 2006, Pages 100-101

  Galchev, Tzeno ^a   Welch, Warren C ^a   Najafi, Khalil ^a  

^a UNIVERSITY OF MICHIGAN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ACTUATORS; ASPECT RATIO; BONDING; CMOS INTEGRATED CIRCUITS; DIELECTRIC DEVICES; DIELECTRIC MATERIALS; LOW-K DIELECTRIC; MICROSYSTEMS; SILICA; SILICON ON INSULATOR TECHNOLOGY; SILICON OXIDES; SOLID-STATE SENSORS; SYSTEMS ENGINEERING; TEMPERATURE; WAFER BONDING;

DIELECTRIC BARRIER DISCHARGES; INSULATION LAYERS; LOW TEMPERATURE WAFER BONDING; LOW TEMPERATURES; SILICON DIOXIDE LAYERS; SILICON-ON-GLASS; SILICON-ON-INSULATOR PROCESS; SILICON-ON-SILICON;

SILICON WAFERS;

EID: 79953655404     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. J. Chae, H. Kulah, and K. Najafi, "A hybrid Silicon-On-Glass (SOG) lateral micro-accelerometer with CMOS readout circuitry," MEMS'02, Las Vegas, NV, (2002).
2. nd Electr. Comp. & Tech. Conference, San Diego, CA, (2002).
3. J. Chae, H. Kulah, and K. Najafi, "A hybrid Silicon-On-Glass (SOG) lateral micro-accelerometer with CMOS readout circuitry," MEMS'02, Las Vegas, NV, (2002).
4. K. Ishihara, Y. Chi-Fan, A. A. Ayon, and M. A. Schmidt, "Inertial sensor technology using DRIE and wafer bonding with connecting capability," JMEMS vol. 8, pp. 403, (1999).
5. Q. Y. Tong and U. Gosele, "Semiconductor Wafer Bonding," John Wiley & Sons Inc, (1999).