A bus-based SoC architecture for flexible module placement on reconfigurable FPGAs

Proceedings - 2010 International Conference on Field Programmable Logic and Applications, FPL 2010

Volumn , Issue , 2010, Pages 234-239

  Oetken, Andreas ^a   Wildermann, Stefan ^a   Teich, Jürgen ^a   Koch, Dirk ^b  

^a UNIVERSITY OF ERLANGEN NUREMBERG   (Germany)

^b UNIVERSITY OF OSLO   (Norway)

Author keywords

[No Author keywords available]

Indexed keywords

BUS SYSTEMS; BUS-BASED; EMBEDDED CPU; EXTERNAL MEMORY; FLEXIBLE MODULES; HIGH-SPEED ACCESS; MEMORY ACCESS; MODULE PLACEMENT; RE-CONFIGURABLE; RECONFIGURABLE DESIGNS; RECONFIGURABLE MODULE; RUN TIME RECONFIGURATION; SMART CAMERAS; SOC ARCHITECTURE; STREAMING TECHNOLOGY; SUB-SYSTEMS; SYSTEM-ON-CHIP ARCHITECTURE;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER HARDWARE; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); MICROPROCESSOR CHIPS; MULTIMEDIA SYSTEMS; PROGRAMMABLE LOGIC CONTROLLERS;

RECONFIGURABLE HARDWARE;

EID: 79551552492     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPL.2010.54     Document Type: Conference Paper

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