150 °C amorphous silicon thin film transistors with low-stress nitride on transparent plastic

IEEE/OSA Journal of Display Technology

Volumn 7, Issue 1, 2011, Pages 36-39

  Chan, Isaac ^a   Moradi, Maryam ^b   Sazonov, Andrei ^a   Nathan, Arokia ^c  

^a UNIVERSITY OF WATERLOO   (Canada)

^b IGNIS Innovation Inc   (Canada)

^c UNIVERSITY COLLEGE LONDON   (United Kingdom)

Author keywords

150 C plasma enhanced chemical vapor deposition (PECVD); Amorphous silicon (a Si); free standing transparent plastic substrate; silicon nitride; thin film transistor (TFT)

Indexed keywords

AMORPHOUS SILICON (A-SI); AMORPHOUS SILICON THIN FILM TRANSISTORS; DC BIAS; DEPOSITION POWER; DEVICE MOBILITIES; FILM STRESS; GATE-LEAKAGE CURRENT; HYDROGENATED AMORPHOUS SILICON (A-SI:H); LOW STRESS; ON/OFF CURRENT RATIO; POLYETHYLENE NAPHTHALATE; THRESHOLD VOLTAGE SHIFTS; TRANSPARENT PLASTICS;

AMORPHOUS FILMS; DC POWER TRANSMISSION; LEAKAGE CURRENTS; PLASMA DEPOSITION; PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION; SEMICONDUCTING ORGANIC COMPOUNDS; SEMICONDUCTING SILICON COMPOUNDS; SILICON NITRIDE; SUBSTRATES; THIN FILM TRANSISTORS; THRESHOLD VOLTAGE; VAPOR DEPOSITION; YIELD STRESS;

AMORPHOUS SILICON;

EID: 78951493520     PISSN: 1551319X     EISSN: None     Source Type: Journal    
DOI: 10.1109/JDT.2010.2089782     Document Type: Article

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