High-K dielectric stack percolation breakdown statistics

ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings

Volumn , Issue , 2010, Pages 1588-1591

  Suñé, Jordi ^a   Wu, Ermest Y ^b   Tous, S ^a  

^a UNIVERSITAT AUTÒNOMA DE BARCELONA   (Spain)

^b IBM MICROELECTRONICS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CELL-BASED; DIELECTRIC BREAKDOWNS; DIELECTRIC LAYER; EQUIVALENT OXIDE THICKNESS; HIGH-K DIELECTRIC; INTERFACE LAYER; KINETIC MONTE CARLO; OXIDE AREA; PERCOLATION MODELS; PERCOLATION PATH; PHYSICS-BASED; SAMPLE SIZES; STACK GATE DIELECTRICS; STATISTICAL DATAS;

DIELECTRIC MATERIALS; ELECTRIC BREAKDOWN; GATE DIELECTRICS; GATES (TRANSISTOR); INTEGRATED CIRCUITS; PROBABILITY; SILICON COMPOUNDS; SOLVENTS;

LEAKAGE CURRENTS;

EID: 78751520263     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICSICT.2010.5667444     Document Type: Conference Paper

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