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Volumn , Issue , 2010, Pages

3D substrate innovation for complex high pin count flip-chip applications

Author keywords

[No Author keywords available]

Indexed keywords

3-D SUBSTRATE; ARRAY PATTERNS; CONTACT PATTERN; DIRECT CHIP ATTACHMENTS; FLIP CHIP; FLIP CHIP APPLICATIONS; GLASS/EPOXY; HIGH TEMPERATURE; HIGH-DENSITY; LITHOGRAPHIC PROCESS; METALLIZATIONS; MULTIPLE FUNCTION; PB-FREE; PIN COUNTS; PRODUCT PERFORMANCE; SOLDER BUMP; SOLDER PROCESS; SPEED PROCESSORS; SUBSTRATE INTERFACE; WAFER LEVEL; WIREBOND;

EID: 78651344071     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESTC.2010.5642880     Document Type: Conference Paper
Times cited : (1)

References (4)
  • 2
    • 51349115254 scopus 로고    scopus 로고
    • Crack Growth-Resistant Interconnects for High-Reliability Microelectronics
    • in publication
    • Mohammed I, Banijamali B, Savalia P; "Crack Growth-Resistant Interconnects for High-Reliability Microelectronics", 57th ECTC, 2008, in publication.
    • (2008) 57th ECTC
    • Mohammed, I.1    Banijamali, B.2    Savalia, P.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.