Matrix converter protection and computational capabilities based on a system on chip design with an FPGA

IEEE Transactions on Power Electronics

Volumn 26, Issue 1, 2011, Pages 272-287

  Ormaetxea, Enekoitz ^a   Andreu, Jon ^a   Kortabarria, Iñigo ^a   Bidarte, Unai ^a   De Alegría, Iñigo Martínez ^a   Ibarra, Edorta ^a   Olaguenaga, Ekaitz ^a,b  

^a UNIVERSITY OF THE BASQUE COUNTRY UPV EHU   (Spain)

^b TECNALIA RESEARCH AND INNOVATION   (Spain)

Author keywords

Core; field programmable gate array (FPGA); matrix converter (MC); modulation; protection; system on chip (SoC)

Indexed keywords

COMPUTATIONAL CAPABILITY; COMPUTATIONAL CAPACITY; CONTROL TECHNIQUES; CORE; HARDWARE BLOCKS; HIGH MODULATION FREQUENCY; MATRIX CONVERTER; PROCESSING CAPABILITY; PROCESSING TIME; PROTECTION; PROTECTION SYSTEMS; REAL TIME; SEQUENTIAL CONTROL; SINGLE CHIPS; SPACE VECTOR MODULATION; SYSTEM ON A PROGRAMMABLE CHIPS; SYSTEM ON CHIP DESIGN; SYSTEM ON CHIPS;

DESIGN; LOGIC GATES; MODULATION; PROGRAMMABLE LOGIC CONTROLLERS; VECTOR SPACES;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 78650992566     PISSN: 08858993     EISSN: None     Source Type: Journal    
DOI: 10.1109/TPEL.2010.2062539     Document Type: Article

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