-
1
-
-
77649314785
-
A formal architecture pattern for real-time distributed systems
-
Los Alamitos
-
Al-Nayeem, A., Sun, M., Qiu, X., Sha, L., Miller, S. P., Cofer, D. D.: A formal architecture pattern for real-time distributed systems. In: Proc. RTSS 2009. IEEE, Los Alamitos (2009)
-
(2009)
Proc. RTSS 2009. IEEE
-
-
Al-Nayeem, A.1
Sun, M.2
Qiu, X.3
Sha, L.4
Miller, S.P.5
Cofer, D.D.6
-
2
-
-
0022144867
-
Complexity of network synchronization
-
Awerbuch, B.: Complexity of network synchronization. J. ACM 32(4), 804-823 (1985)
-
(1985)
J. ACM
, vol.32
, Issue.4
, pp. 804-823
-
-
Awerbuch, B.1
-
3
-
-
0025387617
-
Synchronizing asynchronous bounded delay networks
-
Chou, C.-T., Cidon, I., Gopal, I. S., Zaks, S.: Synchronizing asynchronous bounded delay networks. IEEE Trans. Commun. 38(2), 144-147 (1990)
-
(1990)
IEEE Trans. Commun.
, vol.38
, Issue.2
, pp. 144-147
-
-
Chou, C.-T.1
Cidon, I.2
Gopal, I.S.3
Zaks, S.4
-
4
-
-
34447617790
-
All about maude - A high-performance logical framework
-
Springer, Heidelberg
-
Clavel, M., Durán, F., Eker, S., Lincoln, P., Martí-Oliet, N., Meseguer, J., Talcott, C.: All About Maude - A High-Performance Logical Framework. LNCS, vol. 4350. Springer, Heidelberg (2007)
-
(2007)
LNCS
, vol.4350
-
-
Clavel, M.1
Durán, F.2
Eker, S.3
Lincoln, P.4
Martí-Oliet, N.5
Meseguer, J.6
Talcott, C.7
-
5
-
-
70350637206
-
Verification of GALS systems by combining synchronous languages and process calculi
-
Pǎšareanu, C. S. ed., Springer, Heidelberg
-
Garavel, H., Thivolle, D.: Verification of GALS systems by combining synchronous languages and process calculi. In: Pǎšareanu, C. S. (ed.) SPIN Workshop. LNCS, vol. 5578, pp. 241-260. Springer, Heidelberg (2009)
-
(2009)
SPIN Workshop. LNCS
, vol.5578
, pp. 241-260
-
-
Garavel, H.1
Thivolle, D.2
-
6
-
-
84948961781
-
Automatic production of globally asynchronous locally synchronous systems
-
Sangiovanni-Vincentelli, A. L., Sifakis, J. eds., Springer, Heidelberg
-
Girault, A., Ménier, C.: Automatic production of globally asynchronous locally synchronous systems. In: Sangiovanni-Vincentelli, A. L., Sifakis, J. (eds.) EMSOFT 2002. LNCS, vol. 2491. Springer, Heidelberg (2002)
-
(2002)
EMSOFT 2002. LNCS
, vol.2491
-
-
Girault, A.1
Ménier, C.2
-
7
-
-
0017996760
-
Time, clocks, and the ordering of events in a distributed system
-
Lamport, L.: Time, clocks, and the ordering of events in a distributed system. Commun. ACM 21(7), 558-565 (1978)
-
(1978)
Commun. ACM
, vol.21
, Issue.7
, pp. 558-565
-
-
Lamport, L.1
-
8
-
-
0027113376
-
Conditional rewriting logic as a unified model of concurrency
-
Meseguer, J.: Conditional rewriting logic as a unified model of concurrency. Theoretical Computer Science 96, 73-155 (1992)
-
(1992)
Theoretical Computer Science
, vol.96
, pp. 73-155
-
-
Meseguer, J.1
-
9
-
-
78649612436
-
Formalization and correctness of the PALS architectural pattern for distributed real-time systems
-
University of Illinosis at Urbana-Champaign
-
Meseguer, J., Ölveczky, P. C.: Formalization and correctness of the PALS architectural pattern for distributed real-time systems. Technical Report at CS dept., University of Illinosis at Urbana-Champaign (2010), http://hdl.handle.net/2142/17089
-
(2010)
Technical Report at CS dept.
-
-
Meseguer, J.1
Ölveczky, P.C.2
-
10
-
-
77951063154
-
Implementing logical synchrony in integrated modular avionics
-
IEEE, Los Alamitos
-
Miller, S. P., Cofer, D., Sha, L., Meseguer, J., Al-Nayeem, A.: Implementing logical synchrony in integrated modular avionics. In: Proc. 28th Digital Avionics Systems Conference. IEEE, Los Alamitos (2009)
-
(2009)
Proc. 28th Digital Avionics Systems Conference
-
-
Miller, S.P.1
Cofer, D.2
Sha, L.3
Meseguer, J.4
Al-Nayeem, A.5
-
12
-
-
34547355660
-
Correct-by-construction asynchronous implementation of modular synchronous specifications
-
Potop-Butucaru, D., Caillaud, B.: Correct-by-construction asynchronous implementation of modular synchronous specifications. Fundam. Inform. 78(1), 131-159 (2007)
-
(2007)
Fundam. Inform
, vol.78
, Issue.1
, pp. 131-159
-
-
Potop-Butucaru, D.1
Caillaud, B.2
-
13
-
-
84947287460
-
Bus architectures for safety-critical embedded systems
-
Henzinger, T. A., Kirsch, C. M. eds., Springer, Heidelberg
-
Rushby, J. M.: Bus architectures for safety-critical embedded systems. In: Henzinger, T. A., Kirsch, C. M. (eds.) EMSOFT 2001. LNCS, vol. 2211, pp. 306-323. Springer, Heidelberg (2001)
-
(2001)
EMSOFT 2001. LNCS
, vol.2211
, pp. 306-323
-
-
Rushby, J.M.1
-
14
-
-
77649287594
-
PALS: Physically asynchronous logically synchronous systems
-
University of Illinois at Urbana-Champaign
-
Sha, L., Al-Nayeem, A., Sun, M., Meseguer, J., Ölveczky, P. C.: PALS: Physically asynchronous logically synchronous systems. Technical report, University of Illinois at Urbana-Champaign (2009), http://hdl.handle.net/2142/ 11897
-
(2009)
Technical Report
-
-
Sha, L.1
Al-Nayeem, A.2
Sun, M.3
Meseguer, J.4
Ölveczky, P.C.5
-
16
-
-
0028377756
-
Synchronizing ABD networks
-
Tel, G., Korach, E., Zaks, S.: Synchronizing ABD networks. IEEE Trans. Networking 2(1), 66-69 (1994)
-
(1994)
IEEE Trans. Networking
, vol.2
, Issue.1
, pp. 66-69
-
-
Tel, G.1
Korach, E.2
Zaks, S.3
-
17
-
-
51349124945
-
Implementing synchronous models on loosely time triggered architectures
-
Tripakis, S., Pinello, C., Benveniste, A., Sangiovanni-Vincentelli, A., Caspi, P., DiNatale, M.: Implementing synchronous models on loosely time triggered architectures. IEEE Trans. on Computers 1(2008)
-
(2008)
IEEE Trans. on Computers
, vol.1
-
-
Tripakis, S.1
Pinello, C.2
Benveniste, A.3
Sangiovanni-Vincentelli, A.4
Caspi, P.5
DiNatale, M.6
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