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Volumn 2, Issue , 2010, Pages 821-824

Guidelines for Verilog - A compact model coding

Author keywords

Compact model; Guidelines; Verilog A

Indexed keywords

COMPACT DEVICES; COMPACT MODEL; COMPACT MODELING; GUIDELINES; MEMORY CONSUMPTION; RUNNING-IN; SEMANTIC RULES; SPICE MODEL; SPICE SIMULATORS; VERILOG; VERILOG-A; VERILOG-AMS HARDWARE DESCRIPTION LANGUAGE;

EID: 78049448921     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (8)

References (10)
  • 6
    • 6344221538 scopus 로고    scopus 로고
    • Standardization of compact device moding in high level description language
    • L. Lemaitre, C. McAndrew and W. Grabinski "Standardization of Compact Device moding in High Level Description Language", Nanotech 2003, Vol. 2
    • Nanotech 2003 , vol.2
    • Lemaitre, L.1    McAndrew, C.2    Grabinski, W.3
  • 8
    • 78049416974 scopus 로고    scopus 로고
    • This work is supported by the European Commission FP7 under contract number 218255 (COMON)
    • This work is supported by the European Commission FP7 under contract number 218255 (COMON)
  • 9
    • 6344293764 scopus 로고    scopus 로고
    • Changing the paradigm for compact model integration in circuit simulators using verilog-A
    • M. Mierzwinsk, P.O. Halloran, B. Troyanovsky and R. Dutton, "Changing the Paradigm for Compact Model Integration in Circuit Simulators Using Verilog-A", Nanotech 2003, Vol. 2
    • Nanotech 2003 , vol.2
    • Mierzwinsk, M.1    Halloran, P.O.2    Troyanovsky, B.3    Dutton, R.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.