Recent innovations in DRAM manufacturing

ASMC (Advanced Semiconductor Manufacturing Conference) Proceedings

Volumn , Issue , 2010, Pages 264-269

  James, Dick ^a  

^a Chipworks Inc   (Canada)

Author keywords

Advanced materials; Advanced processes; DRAM

Indexed keywords

ADVANCED MATERIALS; ADVANCED PROCESS; CELL SIZE; CHIP TECHNOLOGY; COMMERCIAL PRODUCTIONS; COMPOSITIONAL ANALYSIS; DIFFERENT STRUCTURE; DRAM; DRAM CELLS; DUAL LAYER; DYNAMIC RANDOM ACCESS MEMORY; FLOORSPACE; HIGH-K DIELECTRIC; LEADING EDGE; MANUFACTURING PROCESS;

COMPETITION; COMPETITIVE INTELLIGENCE; INDUSTRY; MANUFACTURE; NANOTECHNOLOGY;

DYNAMIC RANDOM ACCESS STORAGE;

EID: 77957597739     PISSN: 10788743     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASMC.2010.5551462     Document Type: Conference Paper

References (5)

1. Y.K. Park., et al. "Highly Manufacturable 90 nm DRAM Technology", 2002 IEDM Technical Digest, pp. 819 - 822.
2. Kim, J.Y., et al., "The Breakthrough in data retention time of DRAM using Recess-Channel-Array-Transistor (RCAT) for 88nm feature size and beyond", 2003 Symposium on VLSI Technology, pp. 11 - 12.
3. Kim, D.H., et al., "A Mechanically Enhanced Storage node for virtually unlimited Height (MESH) Capacitor Aiming at sub 70nm DRAMs", 2004 IEDM Technical Digest, pp. 69 - 72.
4. Schloesser, T., et al., "A 6F2 Buried Wordline DRAM Cell for 40nm and Beyond", 2008 IEDM Technical Digest, pp. 809 - 812.
5. Qimonda DRAM Technology Roadmap, Feb. 25, 2008.