Two-stage fully-differential inverter-based self-biased CMOS amplifier with high efficiency

ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems

Volumn , Issue , 2010, Pages 2828-2831

  Figueiredo, M ^a   Santin, E ^a   Goes, J ^a   Santos Tavares, R ^a   Evans, G ^b  

^a UNINOVA   (Portugal)

^b UNIVERSITY OF LISBON   (Portugal)

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT ANALYSIS; CLASS A; CLASS-AB AMPLIFIERS; CMOS AMPLIFIERS; DC GAIN; DESIGN METHODOLOGY; FULLY-DIFFERENTIAL; HIGH EFFICIENCY; INVERTER STAGE; INVERTER-BASED; SELF BIASING; SELF-BIASED; SIMULATION RESULT; TWO STAGE;

DIFFERENTIAL AMPLIFIERS; FABRICS;

ELECTRIC NETWORK ANALYSIS;

EID: 77955995395     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2010.5536985     Document Type: Conference Paper

References (13)

1. R. Tavares, B. Vaz, J. Goes, N. Paulino, A. Steiger-Garcao, "Design and optimization of low-voltage two-stage CMOS amplifiers with enhanced performance", ISCAS 2003, vol.1, pp. I-197-200, May 2003.
2. M. Bazes, "Two novel fully complementary self-biased CMOS differential amplifiers", JSSC, vol.26, pp.165-168, Feb. 1991.
3. S.B.T. Wang, A.M. Niknejad, R.W. Brodersen, "Design of a Sub-mW 960-MHz UWB CMOS LNA," JSSC, vol.41,pp.2449-2456, Nov. 2006.
4. B.K. Ahuja, "An improved frequency compensation technique for CMOS operational amplifiers", JSSC, vol.18, pp. 629-633, Dec. 1983.
5. O. Choksi; L.R. Carley, "Analysis of switched-capacitor common-mode feedback circuit", IEEE TCAS II: Analog and Digital Signal Processing, vol.50, pp. 906-917, Dec. 2003.
6. F. Leyn, W. Daems, G. Gielen, W. Sansen, "A behavioral signal path modeling methodology for qualitative insight in and efficient sizing of CMOS opamps", CAD, Dig. of Tech. Papers, pp. 374-381, Nov 1997.
7. A. D. Grasso, G. Palumbo and S. Pennisi, "Three-Stage CMOS OTA for Large Capacitive Loads With Efficient Frequency Compensation Scheme", IEEE TCAS-II, Vol. 53, pp. 1044-1048, Oct. 2006.
8. J. Ramírez-Angulo, M.-S. Sawant, S. Thoutam, A. J. López-Martín, and R. G. Carvajal, "New Low-Voltage Class AB/AB CMOS Opamp With Rail-to-Rail Input/Output Swing", IEEE TCAS-II, Vol. 53, pp. 289-293, April 2006.
9. M. Yavari and O. Shoaei, "Very Low-Voltage, Low-Power and Fast- Settling OTA for Switched-Capacitor Applications", ICM 2002, pp. 10- 13, Dec. 2002.
10. K. D. Layton, D. T. Comer, and D. J. Comer, "Bulk-Driven Gain- Enhanced Fully-Differential Amplifier for VT+2Vdsat Operation", IEEE ISCAS 2008, pp. 77-80, May 2008.
11. A.P. Perez, K.Y.B. Nithin, E. Bonizzoni, F. Maloberti, "Slew-rate and gain enhancement in two stage operational amplifiers", IEEE ISCAS 2009, pp. 2485-2488, May 2009
12. J. Ramírez-Angulo, R. G. Carvajal, J. A. Galán, and A. López-Martín, "A Free But Efficient Low-Voltage Class-AB Two-Stage Operational Amplifier", IEEE TCAS-II, Vol. 53, pp. 567-571, July 2006.
13. R.S. Assaad and J. Silva-Martinez, "The Recycling Folded Cascode: A General Enhancement of the Folded Cascode Amplifier", IEEE JSSC, vol. 44, no.9, pp. 2535-2542, Sep. 2009.