Efficient simulation of weak nonlinearities in continuous-time oversampling converters

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 57, Issue 8, 2010, Pages 1925-1934

  Pavan, Shanthi ^a  

^a INDIAN INSTITUTE OF TECHNOLOGY MADRAS   (India)

Author keywords

Continuous time (CT); delta; modulator; nonlinear; oversampling; quantization noise; sigma; Volterra; weakly

Indexed keywords

CIRCUIT SIMULATION; IMAGE CODING; MODULATORS; NONLINEAR OPTICS; OPERATIONAL AMPLIFIERS;

CONTINUOUSTIME; DELTA; NONLINEAR; OVER SAMPLING; QUANTIZATION NOISE; SIGMA; VOLTERRA; WEAKLY;

CONTINUOUS TIME SYSTEMS;

EID: 77955662490     PISSN: 15498328     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2009.2039833     Document Type: Article

References (17)

1. G. Mitteregger, C. Ebner, S. Mechnig, T. Blon, C. Holuigue, and E. Romani, "A 20-mW 640-MHzCMOScontinuous-time ΣΔ ADCwith 20 MHz signal bandwidth, 80 dB dynamic range and 12 bit ENOB," IEEE J. Solid-State Circuits, vol.41, no.12, pp. 2641-2649, Dec. 2006.
2. S. Pavan, N. Krishnapura, R. Pandarinathan, and P. Sankar, "A power optimized continuous-time ΣDelta; ADC for audio applications," IEEE J. Solid-State Circuits, vol.43, no.2, pp. 351-360, Feb. 2008.
3. S. Ouzounov, R. van Veldhoven, C. Bastiaansen, K. Vongehr, R. van Wegberg, G. Geelen, L. Breems, and A. van Roermund, "A 1.2 V 121-mode CTDSM for wireless receivers in 90-nm CMOS," in Proc. ISSCC, 2007, pp. 238-239.
4. R. Schreier and G. Temes, Understanding ΣDelta; Data Converters. Piscataway, NJ: IEEE Press, 2005.
5. J. Cherry and W. Snelgrove, "Clock jitter and quantizer metastability in continuous-time delta-sigma modulators," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol.46, no.6, pp. 661-676, Jun. 1999.
6. L. Hernandez, A. Wiesbauer, S. Paton, and A. Di Giandomencio, "Modelling and optimization of low pass continuous-time sigma delta modulators for clock jitter noise reduction," in Proc. Int. Symp. Circuits Syst., 2004, vol.1, pp. I-1072-I-1075.
7. K. Reddy and S. Pavan, "Fundamental limitations of continuous-time delta-sigma modulators due to clock jitter," IEEE Trans. Circuits Syst. I, Reg. Papers, vol.54, no.10, pp. 2184-2194, Oct. 2007.
8. E. Martens and G. Gielen, "Analyzing continuous-time ΣDelta; modulators with generic behavioral models," IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol.25, no.5, pp. 924-932, May 2006.
9. G. Gielen, K. Francken, E. Martens, and M. Vogels, "An analytical integration method for the simulation of continuous-time ΣDelta; modulators," IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol.23, no.3, pp. 389-399, Mar. 2004.
10. L. J. Breems, E. J. van der Zwan, and J. H. Huijsing, "Design for optimum performance to power ratio of a continuous time ΣDelta; modulator," in Proc. ESSCIRC, 1999, pp. 318-321.
11. A. Leuciuc, "On the nonlinearity of integrators in continuous-time delta-sigma modulators," in Proc. IEEE MWSCAS, 2001, vol.2, pp. 862-865.
12. P. Sankar and S. Pavan, "Analysis of integrator nonlinearity in a class of continuous-time delta-sigma modulators," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol.54, no.12, pp. 661-676, Dec. 1999.
13. J. Bussgang, L. Ehrman, and J. Graham, "Analysis of nonlinear systems with multiple inputs," Proc. IEEE, vol.62, no.8, pp. 1088-1119, Aug. 1974.
14. P. Wambacq and W. Sansen, Distortion Analysis of Analog Integrated Circuits. Norwell, MA: Kluwer, 1998.
15. P. Sotiriadis, A. Celik, D. Loizos, and Z. Zhang, "Fast state-space harmonic distortion estimation in weakly nonlinear ΣΔ C filters," IEEE Trans. Circuits Syst. I, Reg. Papers, vol.54, no.1, pp. 218-228, Jan. 2007.
16. R. Schreier, "The Delta-Sigma toolbox," Matlab Code and Documentation 2004, ver. 7.1.
17. J. Cherry and W. Snelgrove, Continuous-Time Delta-Sigma Modulators for High-Speed A/D Conversion: Theory, Practice, and Fundamental Performance Limits. Berlin, Germany: Springer-Verlag, 1999.