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Volumn 15, Issue 3, 2010, Pages 299-306

Data dependence graph directed scheduling for clustered VLIW architectures

Author keywords

Cluster assignments; Clustered VLIW processor; Instruction scheduling

Indexed keywords

AVERAGE SPEED; CLUSTER ASSIGNMENT; CLUSTERED VLIW; DATA DEPENDENCE GRAPHS; DATA-COMMUNICATION; HIGH PERFORMANCE CODES; INSTRUCTION SCHEDULING; SPEED-UPS; VERY LONG INSTRUCTION WORDS;

EID: 77955291813     PISSN: 10070214     EISSN: None     Source Type: Journal    
DOI: 10.1016/S1007-0214(10)70065-1     Document Type: Article
Times cited : (7)

References (16)
  • 7
    • 0033888003 scopus 로고    scopus 로고
    • The TigerSharc DSP architecture
    • J Fridman, Z Greenfield The TigerSharc DSP architecture IEEE Micro 20 2000 66 76
    • (2000) IEEE Micro , vol.20 , pp. 66-76
    • Fridman, J.1    Greenfield, Z.2
  • 12
    • 0032308536 scopus 로고    scopus 로고
    • Unified assign and schedule: A new approach to scheduling for clustered register file microarchitectures
    • Dallas, Texas, USA
    • Özer E, Banerjia S, Conte T. Unified assign and schedule: A new approach to scheduling for clustered register file microarchitectures. In: Proceedings of the 31st Annual ACM/IEEE International Symposium on. Dallas, Texas, USA, 1998: 308-315.
    • (1998) Proceedings of the 31st Annual ACM/IEEE International Symposium on , pp. 308-315
    • Özer, E.1    Banerjia, S.2    Conte, T.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.