URBiVA: Uniform reduction to bit-vector arithmetic

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 6173 LNAI, Issue , 2010, Pages 346-352

  Marić, Filip ^a   Janičić, Predrag ^a  

^a Faculty of Mathematics   (Serbia)

Author keywords

[No Author keywords available]

Indexed keywords

HIGH LEVEL SPECIFICATION; PROBLEM DESCRIPTION; SYMBOLIC EXECUTION; UNIFORM REDUCTION;

HIGH LEVEL LANGUAGES; PROBLEM SOLVING; SPECIFICATION LANGUAGES; SPECIFICATIONS;

AUTOMATA THEORY;

EID: 77955245910     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-642-14203-1_29     Document Type: Conference Paper

References (6)

1. Brinkmann, R., Drechsler, R.: Rtl-datapath verification using integer linear programming. In: Proceedings of the VLSI Design 2002. IEEE Computer Society, Los Alamitos (2002)
2. Brummayer, R., Biere, A.: Boolector: An efficient smt solver for bit-vectors and arrays. In: Kowalewski, S., Philippou, A. (eds.) TACAS 2009. LNCS, vol. 5505, pp. 178-181. Springer, Heidelberg (2009)
3. Bruttomesso, R., Cimatti, A., Franzén, A., Griggio, A., Sebastiani, R.: The mathSAT 4 SMT solver. In: Gupta, A., Malik, S. (eds.) CAV 2008. LNCS, vol. 5123, pp. 299-303. Springer, Heidelberg (2008)
4. Bryant, R.E., Kroening, D., Ouaknine, J., Seshia, S.A., Strichman, O., Brady, B.A.: An abstraction-based decision procedure for bit-vector arithmetic. STTT 11(2) (2009)
5. Janičić, P.: Uniform Reduction to SAT (manuscript submitted) (2010)
6. Marić, F.: Formalization and Implementation of Modern SAT Solvers. Journal of Automated Reasoning 43(1) (2009)