Cache oblivious parallelograms in iterative stencil computations

Proceedings of the International Conference on Supercomputing

Volumn , Issue , 2010, Pages 49-59

  Strzodka, Robert ^a   Shaheen, Mohammed ^a   Pajak, Dawid ^b   Seidel, Hans Peter ^a  

^a MAX PLANCK INSTITUTE FOR INFORMATICS   (Germany)

^b WEST POMERANIAN UNIVERSITY OF TECHNOLOGY   (Poland)

Author keywords

cache oblivious; memory bound; memory wall; parallelism and locality; stencil; temporal blocking; time skewing

Indexed keywords

3D-SPATIAL DOMAIN; BLOCKING TIME; CACHE-OBLIVIOUS; DATA LOCALITY; DOUBLE PRECISION; EXECUTION TIME; ITERATION SPACES; MEMORY WALL; ON-CHIP CACHE; OPTIMIZERS; PARALLELIZATIONS; PERFORMANCE BENEFITS; STENCIL COMPUTATIONS; SYSTEM BANDWIDTH; TILING STRUCTURES; VECTORIZATION; WORK-LOAD DISTRIBUTION;

INTELLIGENT CONTROL;

CACHE MEMORY;

EID: 77954709215     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1810085.1810096     Document Type: Conference Paper

References (18)

1. G. E. Blelloch, P. B. Gibbons, and H. V. Simhadri. Low depth cache-oblivious algorithms. Technical report, Carnegie Mellon University, 2009.
2. U. Bondhugula, A. Hartono, J. Ramanujam, and P. Sadayappan. A practical automatic polyhedral parallelizer and locality optimizer. SIGPLAN Not., 43(6):101-113, 2008.
3. M. Frigo and V. Strumpen. Cache oblivious stencil computations. In ICS '05: Proceedings of the 19th annual international conference on Supercomputing, pages 361-366. ACM, 2005.
4. M. Frigo and V. Strumpen. The cache complexity of multithreaded cache oblivious algorithms. In SPAA '06: Proceedings of the eighteenth annual ACM symposium on Parallelism in algorithms and architectures, pages 271-280, New York, NY, USA, 2006. ACM.
5. M. A. Frumkin and R. F. Van der Wijngaart. Tight bounds on cache use for stencil operations on rectangular grids. Journal of ACM, 49(3):434-453, 2002.
6. A. Hartono, M. M. Baskaran, C. Bastoul, A. Cohen, S. Krishnamoorthy, B. Norris, J. Ramanujam, and P. Sadayappan. Parametric multi-level tiling of imperfectly nested loops. In Proceedings of the 23rd International Conference on Supercomputing, pages 147-157, 2009.
7. HiTLoG: Hierarchical tiled loop generator. http://www.cs.colostate.edu/ MMAlpha/tiling/.
8. S. Kamil, C. Chan, L. Oliker, J. Shalf, and S. Williams. An auto-tuning framework for parallel multicore stencil computations. In International Parallel & Distributed Processing Symposium (IPDPS), 2010.
9. S. Kamil, K. Datta, S. Williams, L. Oliker, J. Shalf, and K. Yelick. Implicit and explicit optimizations for stencil computations. In MSPC '06: Proceedings of the 2006 workshop on Memory system performance and correctness, pages 51-60. ACM, 2006.
10. D. Kim, L. Renganarayanan, D. Rostron, S. V. Rajopadhye, and M. M. Strout. Multi-level tiling: M for the price of one. In Proceedings of the ACM/IEEE Conference on Supercomputing, page 51, 2007.
11. S. Krishnamoorthy, M. Baskaran, U. Bondhugula, J. Ramanujam, A. Rountev, and P. Sadayappan. Effective automatic parallelization of stencil computations. SIGPLAN Not., 42(6):235-244, 2007.
12. D. Orozco and G. Gao. Mapping the FDTD application to many-core chip architectures. Technical report, University of Delaware, Mar. 2009.
13. PluTo: A polyhedral automatic parallelizer and locality optimizer for multicores. http://sourceforge.net/projects/pluto-compiler/.
14. PrimeTile: A parametric multi-level tiler for imperfect loop nests. http://primetile.sourceforge.net.
15. Y. Song and Z. Li. New tiling techniques to improve cache temporal locality. In Proceedings of ACM SIGPLAN Conference on Programming Language Design and Implementation, 1999.
16. V. Strumpen and M. Frigo. Software engineering aspects of cache oblivious stencil computations. Technical report, IBM Research, 2006.
17. M. Wolf. More iteration space tiling. In Proceedings of Supercomputing '89, 1989.
18. D. Wonnacott. Using time skewing to eliminate idle time due to memory bandwidth and network limitations. In Proceedings of International Parallel and Distributed Processing Symposium, 2000.